33486A Datasheet, PDF (10/30 Pages) Freescale Semiconductor, Inc – Dual High-Side Switch for H-Bridge Applications

FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
vary typically from 1.0 MHz to 7.0 MHz. It starts operating at
low frequency.
Reverse Battery Protection
During reverse battery the current flows in the body diodes
of the power MOSFETs, which are forward biased. Figure 5
shows the specific protection that must be implemented.
33486 _{External Low-Side}
V^VB^bA^aT^t
Power MOSFETs
C
MC33486
GgNndD
VBAT
Reverse Battery Protection
Figure 5. Reverse Battery Protection Schematic
A reverse battery component might be needed in the GND
or in the VBAT terminal of the application (i.e., diode or
MOSFET) in order to achieve both reverse battery and
negative transient pulses immunity. If a polarized capacitor is
used, it can be placed as shown in in Figure 5.
Loss of Ground Protection
As Figure 5 shows, a loss of ground will not damage the
33486A because the ground terminal of the device is the
same as the ground of the low side.
Overvoltage/Undervoltage Protection
If the battery voltage falls below 7.0 V typical, the outputs
are turned low (low-side MOSFETs ON) in a low-speed
mode. The 33486A goes back into normal operation mode as
soon as V_BAT rises above the undervoltage threshold. The
undervoltage protection circuitry has hysteresis.
The control circuitry also has an overvoltage detection that
turns the external low-side MOSFETs ON and protects the
load in case V_BAT exceeds 29 V typical. The gate drivers will
also be clamped to 14 V to protect the external low-side
MOSFETs. The low-side MOSFETs remain in the ON state
until the overvoltage condition is removed.
Undervoltage and overvoltage are not reported on the
status output.
Self-Adjusting Switching Speed Mode
This feature allows for reduction in EMC and power
dissipation depending on the application. The 33486A has
two switching speeds (high and low) depending on the input
pulse width. The high-speed condition is active when the
delay between two consecutive input edges is below 250 µs
typical. The low-speed mode is active when the delay
between two consecutive input edges is above 250 µs
typical. The 250 µs delay corresponds about to a 2.0 kHz
frequency with a duty cycle of 50%.
Current Recopy
This feature provides a current mirror with the ratio of 1/
3700 of the sum of the high-side output current. An external
resistor must be connected to the Cur R terminal, then tied to
a microcontroller A / D input for analog voltage measurement
(see Figure 6). This current recopy uses the well-known
Wheatstone bridge principle with the Sense, the Power, and
the load as the three known resistances.
Owing to the internal zener clamp in the gate of the M1
transistor, the Cur R max voltage is typically 11 V.
.
Sense
Power
I CcOoPpYy
M1
To A/D
CCur RR
E^Ex^xte^ter^rnⁿa^al^l
R^ree^ssⁱi^ss^tt^oo^rr
R
1
5000
I _Llo_Oa_Ad_D
+
A
-
M
Mgn₃Cd₃3₄3₈4₆8_A6 _Ground
L^Lo^og^giⁱc^c Ground
gnd
Figure 6. Current Recopy Principle
In case a ground shift occurs between the MCU and the
33486A, the amplifier A (Figure 6, page 10) will adapt its
output to keep the same I_COPY. Of course the shift has to
keep between ±1.0 V.
Overtemperature Protection
The 33486A incorporates overtemperature protection.
Overtemperature detection occurs when an internal high-side
MOSFET is in the ON state. When an overtemperature
condition occurs, both outputs are affected. Both high-side
MOSFETs are turned OFF to protect the 33486A from
33486A
10
Analog Integrated Circuit Device Data
Freescale Semiconductor