LP1071 Datasheet, PDF (8/32 Pages) Freescale Semiconductor, Inc – 802.11a/b/g Baseband System

Functional Description
3.4.2 I/Q DAC
I/Q DAC specifications are shown in Table 4.
Table 4. I/Q DAC
Parameter
Resolution
Maximum Update rate
3dB Signal Bandwidth
Output common-mode voltage
Load
Condition
Min
—
—
—
44
—
—
—
0.7
—
10
Integral Nonlinearity (INL)
—
—
Differential Nonlinearity (DNL)
—
—
Total Harmonic Distortion (THD)
Fin= 1MHz
—
Fin= 10MHz
—
SNR
Fin= 1MHz
—
Fin= 10MHz
—
ENOB
Fin= 1MHz
—
Fin= 10MHz
—
Channel-to-Channel mismatch
Gain
—
Phase
—
DC offset after calibration
—
-1
Wake-up time
From Shutdown
—
From Standby
—
1 See Analog input pin for definition of I/Q DAC output common-mode level.
3.4.3 RSSI ADC
RSSI ADC specifications are shown in Table 5.
Table 5. RSSI ADC Specifications
Parameter
Resolution
Maximum Sampling Frequency
Input Voltage Range
Latency
Integral Nonlinearity (INL)
Condition
Min
—
—
—
10
—
0
—
—
—
—
Typ
8
—
11
Vcmo¹
±1.0
± 0.5
-48.5
-47
48.5
47
7.2
7.0
0.2
0.5
—
—
—
Typ
6
—
—
3
±1.0
Max
Units
—
bit
—
MHz
—
MHz
1.5
V
Kohm
5
pF
—
LSB
—
LSB
—
dB
—
dB
—
dB
—
dB
—
bit
—
bit
—
dB
—
Degree
+1
LSB
10
µs
2
µs
Max
Units
—
bit
—
MHz
3
V
—
cycles
—
LSB
LP1071 Advance Information, Rev. 0.5
8
Freescale Semiconductor
PRELIMINARY