LP1071 Datasheet, PDF (7/32 Pages) Freescale Semiconductor, Inc – 802.11a/b/g Baseband System

Functional Description
3.4 Analog Front End (AFE)
The Analog Front End (AFE) block consists of three Analog-to-Digital Converters (ADCs) and two
Digital-to-Analog Converters (DACs) as given in Table 2.
Table 2. AFE Components
Component
Description
Resolution
I/Q ADC
A 2-channel ADC whose digital output serves as input to digital baseband and
8-bit
whose input is the differential signal from the RF (RX mode).
I/Q DAC
A 2-channel DAC whose digital input is from baseband and output is a
8-bit
differential signal for the RF (TX mode).
RSSI ADC
A single ended, single channel ADC
6-bit
Auxiliary ADC A single ended, single channel ADC
8-bit
Auxiliary DAC A single ended, single channel DAC
8-bit
Clock
22 Msps
44 Msps
10 Msps
1 Msps
20 Msps
3.4.1 I/Q ADC
I/Q ADC specifications are shown in Table 3.
Table 3. I/Q ADC Specifications
Parameter
Condition
Min
Resolution
—
—
Maximum Sampling Frequency
—
22
Signal Bandwidth
—
—
Input impedance
Fixed capacitance
—
Switched capacitance @Fs
—
Latency
—
—
Integral Nonlinearity (INL)
—
—
Differential Nonlinearity (DNL)
—
—
Total Harmonic Distortion (THD)
Fin= 1MHz
—
Fin= 10MHz
—
SNR
Fin= 1MHz
—
Fin= 10MHz
—
ENOB
Fin= 1MHz
—
Fin= 10MHz
—
Channel-to-Channel mismatch
Gain
—
Phase
—
DC offset after calibration
—
–1
Wake-up time
From Shutdown
—
From Standby
—
Typ
8
—
11
1
1
4
±1.0
± 0.5
–48.5
–47
48.5
47
7.2
7.0
0.2
0.5
—
—
—
Max
Units
—
bit
—
MHz
—
MHz
—
pF
—
pF
—
cycles
—
LSB
—
LSB
—
dB
—
dB
—
dB
—
dB
—
bit
—
bit
—
dB
—
Degree
+1
LSB
1
ms
10
µs
LP1071 Advance Information, Rev. 0.5
Freescale Semiconductor
7
PRELIMINARY