LP1071 Datasheet, PDF (13/32 Pages) Freescale Semiconductor, Inc – 802.11a/b/g Baseband System

LP1071 Interfaces
Table 8. SDIO Function 1 Registers (continued)
Bit
Name
Description
ARM
Access
Device to SDIO Host Interrupt Enable 0 (0x0017)
7:0
Arm_to_sdio_inte_en[7:0] Individual bit enables for each of the device to host
—
interrupt source bits. Setting the corresponding bit
to a “1” enables the interrupt; “0” disables the
interrupt. The SDIO Host can disable all interrupts
by disabling the main SDIO host interrupt in the
CCCR register.
Device to SDIO Host Interrupt Enable 1 (0x0018)
2:0
Arm_to_sdio_inte_en[10:8] Individual bit enables for each of the device to host
—
interrupt source bits. Setting the corresponding bit
to a “1” enables the interrupt; “0” disables the
interrupt. The SDIO Host can disable all interrupts
by disabling the main SDIO host interrupt in the
CCCR register.
Bit 0 is enable for semaphore 0 granted; bit 1 is
semaphore 1; and bit 2 is semaphore 2.
7:3
—
Reserved
—
SDIO Host Mailbox Semaphore 0 Register (offset 0x001C)
1:0
Sdio_mbxp_0_sema
2 bit semaphore register to control whether the
RW
host or the device has access to the shared
mailbox ram 0. The host should write a “01” to this
register to request the shared ram 0. After writing
“01” the host should read this register. If the value
is “01” then the host owns access to the mailbox.
If the value read is “11” then the device owns
access to the mailbox. When the host is done
utilizing the mailbox then it should release
ownership of the mailbox by writing “00” to this
register.
7:2
Reserved
—
—
SDIO Host Mailbox Semaphore 1 Register (offset 0x001D)
1:0
Sdio_mbxp_1_sema
2 bit semaphore register to control whether the
RW
host or the device has access to the shared
mailbox ram 1. The host should write a “01” to this
register to request the shared ram 1. After writing
“01” the host should read this register. If the value
is “01” then the host owns access to the mailbox.
If the value read is “11” then the device owns
access to the mailbox. When the host is done
utilizing the mailbox then it should release
ownership of the mailbox by writing “00” to this
register.
7:2
Reserved
—
—
HOST
Access
RW
RW
—
RW
—
RW
—
Reset
0’s
0’s
—
0’s
—
0’s
—
LP1071 Advance Information, Rev. 0.5
Freescale Semiconductor
13
PRELIMINARY