MC68331CEH16 Datasheet, PDF (71/84 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
Table 26 GPT Address Map
Access
S
S
S
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
Address
$YFF900
$YFF902
$YFF904
$YFF906
$YFF908
$YFF90A
$YFF90C
$YFF90E
$YFF910
$YFF912
$YFF914
$YFF916
$YFF918
$YFF91A
$YFF91C
$YFF91E
$YFF920
$YFF922
$YFF924
$YFF926
$YFF928
$YFF92A
$YFF92C
$YFF92E–
$YFF93F
15
87
0
GPT MODULE CONFIGURATION (GPTMCR)
(RESERVED FOR TEST)
INTERRUPT CONFIGURATION (ICR)
PGP DATA DIRECTION (DDRGP)
PGP DATA (PORTGP)
OC1 ACTION MASK (OC1M)
OC1 ACTION DATA (OC1D)
TIMER COUNTER (TCNT)
PA CONTROL (PACTL)
PA COUNTER (PACNT)
INPUT CAPTURE 1 (TIC1)
INPUT CAPTURE 2 (TIC2)
INPUT CAPTURE 3 (TIC3)
OUTPUT COMPARE 1 (TOC1)
OUTPUT COMPARE 2 (TOC2)
OUTPUT COMPARE 3 (TOC3)
OUTPUT COMPARE 4 (TOC4)
INPUT CAPTURE 4/OUTPUT COMPARE 5 (TI4/O5)
TIMER CONTROL 1 (TCTL1)
TIMER CONTROL 2 (TCTL2)
TIMER MASK 1 (TMSK1)
TIMER MASK 2 (TMSK2)
TIMER FLAG 1 (TFLG1)
TIMER FLAG 2 (TFLG2)
FORCE COMPARE (CFORC)
PWM CONTROL C (PWMC)
PWM CONTROL A (PWMA)
PWM CONTROL B (PWMB)
PWM COUNT (PWMCNT)
PWMA BUFFER (PWMBUFA)
PWMB BUFFER (PWMBUFB)
GPT PRESCALER (PRESCL)
NOT USED
Y = M111, where M is the logic state of the modmap (MM) bit in SIMCR.
6.2 Capture/Compare Unit
The capture/compare unit features three input capture channels, four output compare channels, and
one input capture/output compare channel (function selected by control register). These channels share
a 16-bit free-running counter (TCNT), which derives its clock from seven stages of a 9-stage prescaler
or from external clock input PCLK. This section, which is similar to the timer found on the MC68HC11F1,
also contains one pulse accumulator channel. The pulse accumulator logic includes its own 8-bit
counter and can operate in either event counting mode or gated time accumulation mode. Refer to the
following block diagrams of the GPT timer and prescaler.
MC68331TS/D
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