MC68331CEH16 Datasheet, PDF (48/84 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Instruction
MOVEP
MOVEQ
MOVES¹
MULS/MULU
NBCD
NEG
NEGX
NOP
NOT
OR
ORI
ORI to CCR
ORI to SR¹
PEA
RESET¹
ROL
ROR
ROXL
ROXR
RTD
RTE¹
RTR
RTS
SBCD
Scc
STOP¹
Freescale Semiconductor, Inc.
Table 20 Instruction Set Summary (Continued)
Syntax
Dn, (d16, An)
Operand Size
16, 32
Operation
Dn [31 : 24] ⇒ (An + d); Dn [23 : 16] ⇒ (An + d + 2);
Dn [15 : 8] ⇒ (An + d + 4); Dn [7 : 0] ⇒ (An + d + 6)
(d16, An), Dn
#<data>, Dn
Rn, <ea>
<ea>, Rn
<ea>, Dn
<ea>, Dl
<ea>, Dh : Dl
<ea>
<ea>
<ea>
none
<ea>
<ea>, Dn
Dn, <ea>
#<data>, <ea>
#<data>, CCR
#<data>, SR
<ea>
none
Dn, Dn
#<data>, Dn
<ea>
8 ⇒ 32
8, 16, 32
16 ∗ 16 ⇒ 32
32 ∗ 32 ⇒ 32
32 ∗ 32 ⇒ 64
8
8
8, 16, 32
8, 16, 32
none
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16
16
32
none
8, 16, 32
8, 16, 32
16
(An + d) ⇒ Dn [31 : 24]; (An + d + 2) ⇒ Dn [23 : 16];
(An + d + 4) ⇒ Dn [15 : 8]; (An + d + 6) ⇒ Dn [7 : 0]
Immediate data ⇒ Destination
Rn ⇒ Destination using DFC
Source using SFC ⇒ Rn
Source ∗ Destination ⇒ Destination
(signed or unsigned)
0 − Destination₁₀ − X ⇒ Destination
0 − Destination ⇒ Destination
0 − Destination − X ⇒ Destination
PC + 2 ⇒ PC
Destination ⇒ Destination
Source + Destination ⇒ Destination
Data + Destination ⇒ Destination
Source + CCR ⇒ SR
Source ; SR ⇒ SR
SP − 4 ⇒ SP; <ea> ⇒ SP
Assert RESET line
C
Dn, Dn
8, 16, 32
#<data>, Dn
8, 16, 32
<ea>
16
C
Dn, Dn
#<data>, Dn
<ea>
Dn, Dn
#<data>, Dn
<ea>
#d
none
none
none
Dn, Dn
− (An), − (An)
<ea>
#<data>
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
16
none
none
none
8
8
8
16
C
X
X
C
(SP) ⇒ PC; SP + 4 + d ⇒ SP
(SP) ⇒ SR; SP + 2 ⇒ SP; (SP) ⇒ PC;
SP + 4 ⇒ SP;
Restore stack according to format
(SP) ⇒ CCR; SP + 2 ⇒ SP; (SP) ⇒ PC;
SP + 4 ⇒ SP
(SP) ⇒ PC; SP + 4 ⇒ SP
Destination10 − Source10 − X ⇒ Destination
If condition true, then destination bits are set to 1;
else, destination bits are cleared to 0
Data ⇒ SR; STOP
48
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