MC68331CEH16 Datasheet, PDF (49/84 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller

Freescale Semiconductor, Inc.
Instruction
SUB
SUBA
SUBI
SUBQ
SUBX
SWAP
Table 20 Instruction Set Summary (Continued)
Syntax
<ea>, Dn
Dn, <ea>
<ea>, An
#<data>, <ea>
#<data>, <ea>
Dn, Dn
− (An), − (An)
Dn
Operand Size
Operation
8, 16, 32
Destination − Source ⇒ Destination
16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16
Destination − Source ⇒ Destination
Destination − Data ⇒ Destination
Destination − Data ⇒ Destination
Destination − Source − X ⇒ Destination
MSW LSW
TAS
TBLS/TBLU
TBLSN/TBLUN
TRAP
<ea>
<ea>, Dn
Dym : Dyn, Dn
<ea>, Dn
Dym : Dyn, Dn
#<data>
TRAPcc
none
#<data>
TRAPV
none
TST
<ea>
UNLK
An
1. Privileged instruction.
8
8, 16, 32
8, 16, 32
none
none
16, 32
none
8, 16, 32
32
Destination Tested Condition Codes bit 7 of
Destination
Dyn − Dym ⇒ Temp
(Temp ∗ Dn [7 : 0]) ⇒ Temp
(Dym ∗ 256) + Temp ⇒ Dn
Dyn − Dym ⇒ Temp
(Temp ∗ Dn [7 : 0]) / 256 ⇒ Temp
Dym + Temp ⇒ Dn
SSP − 2 ⇒ SSP; format/vector offset ⇒ (SSP);
SSP − 4 ⇒ SSP; PC ⇒ (SSP); SR ⇒ (SSP);
vector address ⇒ PC
If cc true, then TRAP exception
If V set, then overflow TRAP exception
Source − 0, to set condition codes
An ⇒ SP; (SP) ⇒ An, SP + 4 ⇒ SP
MC68331TS/D
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