MC68HC05RC8 Datasheet, PDF (70/122 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
Carrier Modulator Transmitter (CMT)
9.4 Carrier Generator
The carrier signal is generated by counting a predetermined number of
input clocks (500 ns for a 2-MHz oscillator) for both the carrier high time
and the carrier low time. The period is determined by the total number of
clocks counted. The duty cycle is determined by the ratio of high time
clocks to total clocks counted. The high and low time values are user
programmable and are held in two registers. An alternate set of high/low
count values is held in another set of registers to allow the generation of
dual frequency FSK (frequency shift keying) protocols without CPU
intervention. The MCGEN bit in the MCSR must be set and the BASE bit
in the MCSR must be cleared to enable carrier generator clocks. The
block diagram is shown in Figure 9-2.
f_OSC
BASE
MODULATOR/
CARRIER GENERATOR
ENABLE
SECONDARY HIGH COUNT REGISTER
PRIMARY HIGH COUNT REGISTER
=?
CLK _{6-BIT UP COUNTER}
CLR
CARRIER OUT
=?
SECONDARY LOW COUNT REGISTER
PRIMARY LOW COUNT REGISTER
Figure 9-2. Carrier Generator Block Diagram
MODE
PRIMARY/
SECONDARY
SELECT
General Release Specification
MC68HC05RC16 — Rev. 3.0
Carrier Modulator Transmitter (CMT)
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