MC68HC05RC8 Datasheet, PDF (46/122 Pages) Freescale Semiconductor, Inc – General Release Specification

Resets
Freescale Semiconductor, Inc.
5.3 External Reset (RESET)
The RESET pin is one of the two external sources of a reset. This pin is
connected to a Schmitt trigger input gate to provide an upper and lower
threshold voltage separated by a minimum amount of hysteresis. This
external reset occurs whenever the RESET pin is pulled below the lower
threshold and remains in reset until the RESET pin rises above the
upper threshold. This active-low input will generate the RST signal and
reset the CPU and peripherals. Termination of the external RESET input
or the internal COP watchdog reset are the only reset sources that can
alter the operating mode of the MCU.
NOTE: Activation of the RST signal is generally referred to as reset of the
device, unless otherwise specified.
IRQ
RESET
OSC
DATA
ADDRESS
LPRST
V_DD
ADDRESS
CLOCKED
D
LATCH
R
COP WATCHDOG
(COPR)
POWER-ON RESET
(POR)
ILLEGAL ADDRESS
(ILLADDR)
CPU
S
D
LATCH
RST
PH2
Figure 5-1. Reset Block Diagram
TO IRQ
LOGIC
MODE
SELECT
TO OTHER
PERIPHERALS
General Release Specification
MC68HC05RC16 — Rev. 3.0
Resets
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