MC68HC05RC8 Datasheet, PDF (23/122 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Description
Signal Description
1.5.1 V_DD and V_SS
Power is supplied to the microcontroller’s digital circuits using these two
pins. V_DD is the positive supply and V_SS is ground.
1.5.2 IRQ (Maskable Interrupt Request)
In addition to suppling the EPROM with the required programming
voltage, this pin has a mask option as specified by the user that provides
one of two different choices of interrupt triggering sensitivity. The options
are:
1. Negative edge-sensitive triggering only
2. Both negative edge-sensitive and level-sensitive triggering.
The MCU completes the current instruction before it responds to the
interrupt request. When IRQ goes low for at least one t_ILIH (see 11.8
Control Timing (5.0 Vdc and 2.2 Vdc)), a logic 1 is latched internally to
signify that an interrupt has been requested. When the MCU completes
its current instruction, the interrupt latch is tested. If the interrupt latch
contains a logic 1 and the interrupt mask bit (I bit) in the condition code
register is clear, the MCU then begins the interrupt sequence.
If the option is selected to include level-sensitive triggering, the IRQ input
requires an external resistor to V_DD for wired-OR operation.
The IRQ pin contains an internal Schmitt trigger as part of its input to
improve noise immunity.
Refer to Section 4. Interrupts for more detail.
MC68HC05RC16 — Rev. 3.0
General Release Specification
General Description
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