K51P144M100SF2 Datasheet, PDF (70/74 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
144 144 Pin Name
LQF MAP
P BGA
128 B5 PTC19
Default
LCD_P39
ALT0
LCD_P39
ALT1
PTC19
129 A5 PTD0
LCD_P40 LCD_P40 PTD0
130 D4 PTD1
131 C4 PTD2
132 B4 PTD3
133 A4 PTD4
LCD_P41/ LCD_P41/ PTD1
ADC0_SE5 ADC0_SE5
b
b
LCD_P42 LCD_P42 PTD2
LCD_P43 LCD_P43 PTD3
LCD_P44 LCD_P44 PTD4
134 A3 PTD5
135 A2 PTD6
136 M10 VSS
137 F8 VDD
138 A1 PTD7
139 B3 PTD10
LCD_P45/
ADC0_SE6
b
LCD_P46/
ADC0_SE7
b
VSS
VDD
LCD_P47
DISABLED
LCD_P45/
ADC0_SE6
b
LCD_P46/
ADC0_SE7
b
VSS
VDD
LCD_P47
PTD5
PTD6
PTD7
PTD10
140 B2 PTD11
DISABLED
PTD11
141 B1 PTD12
142 C3 PTD13
143 C2 PTD14
144 C1 PTD15
DISABLED
DISABLED
DISABLED
DISABLED
PTD12
PTD13
PTD14
PTD15
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
UART3_CT
S_b
SPI0_PCS0 UART2_RT
S_b
SPI0_SCK UART2_CT
S_b
SPI0_SOUT UART2_RX
SPI0_SIN UART2_TX
SPI0_PCS1 UART0_RT FTM0_CH4
S_b
SPI0_PCS2 UART0_CT FTM0_CH5
S_b
SPI0_PCS3 UART0_RX FTM0_CH6
LCD_P39
LCD_P40
LCD_P41
EWM_IN
LCD_P42
LCD_P43
LCD_P44
EWM_OUT LCD_P45
_b
FTM0_FLT0 LCD_P46
CMT_IRO UART0_TX
UART5_RT
S_b
SPI2_PCS0 UART5_CT
S_b
SPI2_SCK
SPI2_SOUT
SPI2_SIN
SPI2_PCS1
FTM0_CH7
SDHC0_CL
KIN
SDHC0_D4
SDHC0_D5
SDHC0_D6
SDHC0_D7
FB_AD9
FB_AD8
FB_AD7
FB_AD6
FB_AD5
FB_RW_b
FTM0_FLT1 LCD_P47
EzPort
8.2 K51 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
70
Preliminary
Freescale Semiconductor, Inc.