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K51P144M100SF2 Datasheet, PDF (39/74 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz
Peripheral operating requirements and behaviors
Table 25. 16-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA) (continued)
Symbol Description
Conditions1
Min.
Typ.2
Max.
Unit
Notes
DNL
Differential non-
linearity
• ≤13 bit modes
• <12 bit modes
±0.7
±TBD
LSB4
ADC
±0.2
±0.5
conversion
clock
<12MHz,
Max
hardware
averaging
(AVGE =
%1, AVGS
= %11)
INL Integral non-
linearity
• ≤13 bit modes
• <12 bit modes
—
±1.0
±TBD
LSB4
Max
—
±0.5
±TBD
averaging
EFS
Full-scale error
• ≤13 bit modes
• <12 bit modes
—
±0.4
±TBD
LSB4
VADIN =
—
±1.0
±TBD
VDDA
EQ
Quantization
error
• 16 bit modes
• ≤13 bit modes
—
-1 to 0
—
LSB4
—
—
±0.5
ENOB
Effective number 16 bit differential mode
of bits
• Avg=32
• Avg=1
5
TBD
13.6
TBD
bits
TBD
13.2
TBD
bits
16 bit single-ended mode
• Avg=32
• Avg=1
TBD
TBD
TBD
bits
TBD
TBD
TBD
bits
SINAD
Signal-to-noise
plus distortion
See ENOB
6.02 × ENOB + 1.76
dB
THD
Total harmonic
distortion
16 bit differential mode
• Avg=32
5
—
-94
TBD
dB
16 bit single-ended mode
• Avg=32
—
TBD
TBD
dB
SFDR
Spurious free
dynamic range
16 bit differential mode
• Avg=32
5
TBD
95
—
dB
16 bit single-ended mode
• Avg=32
TBD
TBD
—
dB
Table continues on the next page...
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
39