K51P144M100SF2 Datasheet, PDF (69/74 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

144 144 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
LQF MAP
P BGA
5/
5/
TSI0_CH14 TSI0_CH14
105 A12 PTC2
LCD_P22/ LCD_P22/ PTC2
ADC0_SE4 ADC0_SE4
b/
b/
CMP1_IN0/ CMP1_IN0/
TSI0_CH15 TSI0_CH15
SPI0_PCS2 UART1_CT FTM0_CH1
S_b
LCD_P22
106 A11 PTC3
LCD_P23/ LCD_P23/ PTC3
CMP1_IN1 CMP1_IN1
SPI0_PCS1 UART1_RX FTM0_CH2
LCD_P23
107 H8 VSS
VSS
VSS
108 C10 VLL3
VLL3
VLL3
109 C9 VLL2
VLL2
VLL2
110 B9 VLL1
VLL1
VLL1
111 B10 VCAP2 VCAP2 VCAP2
112 A10 VCAP1 VCAP1 VCAP1
113 A9 PTC4
LCD_P24 LCD_P24 PTC4
SPI0_PCS0 UART1_TX FTM0_CH3
CMP1_OUT LCD_P24
114 D8 PTC5
LCD_P25 LCD_P25 PTC5
SPI0_SCK
LPT0_ALT2
CMP0_OUT LCD_P25
115 C8 PTC6
LCD_P26/ LCD_P26/ PTC6
CMP0_IN0 CMP0_IN0
SPI0_SOUT PDB0_EXT
RG
LCD_P26
116 B8 PTC7
LCD_P27/ LCD_P27/ PTC7
CMP0_IN1 CMP0_IN1
SPI0_SIN
LCD_P27
117 A8 PTC8
LCD_P28/ LCD_P28/ PTC8
ADC1_SE4 ADC1_SE4
b/
b/
CMP0_IN2 CMP0_IN2
I2S0_MCLK I2S0_CLKIN
LCD_P28
118 D7 PTC9
LCD_P29/ LCD_P29/ PTC9
ADC1_SE5 ADC1_SE5
b/
b/
CMP0_IN3 CMP0_IN3
I2S0_RX_B
CLK
FTM2_FLT0 LCD_P29
119 C7 PTC10
LCD_P30/
ADC1_SE6
b/
CMP0_IN4
LCD_P30/
ADC1_SE6
b/
CMP0_IN4
PTC10
I2C1_SCL
I2S0_RX_F
S
LCD_P30
120 B7 PTC11
LCD_P31/ LCD_P31/ PTC11
ADC1_SE7 ADC1_SE7
b
b
I2C1_SDA
I2S0_RXD
LCD_P31
121 A7 PTC12
LCD_P32 LCD_P32 PTC12
UART4_RT
S_b
LCD_P32
122 D6 PTC13
LCD_P33 LCD_P33 PTC13
UART4_CT
S_b
LCD_P33
123 C6 PTC14
LCD_P34 LCD_P34 PTC14
UART4_RX
LCD_P34
124 B6 PTC15
LCD_P35 LCD_P35 PTC15
UART4_TX
LCD_P35
125 A6 PTC16
LCD_P36 LCD_P36 PTC16
UART3_RX
LCD_P36
126 D5 PTC17
LCD_P37 LCD_P37 PTC17
UART3_TX
LCD_P37
127 C5 PTC18
LCD_P38 LCD_P38 PTC18
UART3_RT
S_b
LCD_P38
Pinout
EzPort
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
69