K51P144M100SF2 Datasheet, PDF (66/74 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
144 144 Pin Name Default
ALT0
ALT1
LQF MAP
P BGA
ADC1_SE1
8
ADC1_SE1
8
38 L3 TRI0_OUT/ TRI0_OUT/ TRI0_OUT/
OP1_DM2 OP1_DM2 OP1_DM2
39 L4 TRI0_DM TRI0_DM TRI0_DM
40 M4 TRI0_DP TRI0_DP TRI0_DP
41 L5 TRI1_DM TRI1_DM TRI1_DM
42 M5 TRI1_DP TRI1_DP TRI1_DP
43 K5 TRI1_OUT/ TRI1_OUT TRI1_OUT/
CMP2_IN5/
CMP2_IN5/
ADC1_SE2
ADC1_SE2
2
2
44 K4 DAC0_OUT/ DAC0_OUT DAC0_OUT/
CMP1_IN3/
CMP1_IN3/
ADC0_SE2
ADC0_SE2
3/OP0_DP4/
3/OP0_DP4/
OP1_DP4
OP1_DP4
45 J4 DAC1_OUT/ DAC1_OUT DAC1_OUT/
CMP2_IN3/
CMP2_IN3/
ADC1_SE2
ADC1_SE2
3/OP0_DP5/
3/OP0_DP5/
OP1_DP5
OP1_DP5
46 M7 XTAL32 XTAL32 XTAL32
47 M6 EXTAL32 EXTAL32 EXTAL32
48 L6 VBAT
VBAT
VBAT
49 H4 PTE28
DISABLED
PTE28
50 J5 PTA0
JTAG_TCL TSI0_CH1 PTA0
K/
SWD_CLK/
EZP_CLK
51 J6 PTA1
JTAG_TDI/ TSI0_CH2 PTA1
EZP_DI
52 K6 PTA2
JTAG_TDO/ TSI0_CH3 PTA2
TRACE_SW
O/EZP_DO
53 K7 PTA3
JTAG_TMS/ TSI0_CH4 PTA3
SWD_DIO
54 L7 PTA4
NMI_b/ TSI0_CH5 PTA4
EZP_CS_b
55 M8 PTA5
DISABLED
PTA5
ALT2
ALT3
UART0_CT FTM0_CH5
S_b
UART0_RX FTM0_CH6
UART0_TX FTM0_CH7
UART0_RT
S_b
FTM0_CH0
FTM0_CH1
FTM0_CH2
56 E7 VDD
VDD
VDD
57 G7 VSS
VSS
VSS
58 J7 PTA6
DISABLED
PTA6
FTM0_CH3
59 J8 PTA7
ADC0_SE1 ADC0_SE1 PTA7
0
0
FTM0_CH4
ALT4
ALT5
ALT6
ALT7
EzPort
FB_AD20
JTAG_TCL EZP_CLK
K/
SWD_CLK
JTAG_TDI EZP_DI
JTAG_TDO/ EZP_DO
TRACE_SW
O
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
CMP2_OUT I2S0_RX_B JTAG_TRS
CLK
T
FB_CLKOU
T
FB_AD18
TRACE_CL
KOUT
TRACE_D3
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
66
Preliminary
Freescale Semiconductor, Inc.