K50P100M100SF2 Datasheet, PDF (70/73 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
100 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
LQF
P
91 PTC17
PTC17
UART3_TX
FB_CS4_b/
FB_TSIZ0/
FB_BE31_24
_BLS7_0_b
92 PTC18
PTC18
UART3_RTS
_b
FB_TBST_b/
FB_CS2_b/
FB_BE15_8_
BLS23_16_b
93 PTD0
PTD0
SPI0_PCS0 UART2_RTS
_b
FB_ALE/
FB_CS1_b/
FB_TS_b
94 PTD1
/ADC0_SE5b /ADC0_SE5b PTD1
SPI0_SCK UART2_CTS
_b
FB_CS0_b
95 PTD2
PTD2
SPI0_SOUT UART2_RX
FB_AD4
96 PTD3
PTD3
SPI0_SIN UART2_TX
FB_AD3
97 PTD4
PTD4
SPI0_PCS1 UART0_RTS FTM0_CH4 FB_AD2 EWM_IN
_b
98 PTD5
/ADC0_SE6b /ADC0_SE6b PTD5
SPI0_PCS2 UART0_CTS FTM0_CH5 FB_AD1
_b
EWM_OUT_
b
99 PTD6
/ADC0_SE7b /ADC0_SE7b PTD6
SPI0_PCS3 UART0_RX FTM0_CH6 FB_AD0 FTM0_FLT0
100 PTD7
PTD7
CMT_IRO UART0_TX FTM0_CH7
FTM0_FLT1
EzPort
8.2 K50 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
70
Preliminary
Freescale Semiconductor, Inc.