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K50P100M100SF2 Datasheet, PDF (34/73 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz | |||
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Peripheral operating requirements and behaviors
where
⢠Writes_subsystem â minimum number of writes to each FlexRAM location for
subsystem (each subsystem can have different endurance)
⢠EEPROM â allocated FlexNVM for each EEPROM subsystem based on DEPART;
entered with Program Partition command
⢠EEESPLIT â FlexRAM split factor for subsystem; entered with the Program
Partition command
⢠EEESIZE â allocated FlexRAM based on DEPART; entered with Program Partition
command
⢠Write_efficiency â
⢠0.25 for 8-bit writes to FlexRAM
⢠0.50 for 16-bit or 32-bit writes to FlexRAM
⢠nnvmcycd â data flash cycling endurance
Figure 9. EEPROM backup writes to FlexRAM
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
34
Preliminary
Freescale Semiconductor, Inc.
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