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K50P100M100SF2 Datasheet, PDF (54/73 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz | |||
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Peripheral operating requirements and behaviors
Table 33. TRIAMP full range operating behaviors
Symbol
ISUPPLY
Description
Supply current (IOUT=0mA, CL=0) â Low-power
mode
Min.
â
ISUPPLY
Supply current (IOUT=0mA, CL=0) â High-speed â
mode
VOS
Input offset voltage
â
αVOS
Input offset voltage temperature coefficient
â
IOS
Input offset current
â
IBIAS
Input bias current
â
RIN
Input resistance
500
CIN
Input capacitance
â
|XIN|
AC input impedance (fIN=100kHz)
â
CMRR
Input common mode rejection ratio
60
PSRR
Power supply rejection ratio
60
SR
SR
GBW
Slew rate (ÎVIN=100mV) â Low-power mode 0.1
Slew rate (ÎVIN=100mV) â High speed mode 1
Unity gain bandwidth â Low-power mode 50pF 0.15
GBW
Unity gain bandwidth â High speed mode 50pF 1
AV
DC open-loop voltage gain
80
VOUT
Output voltage range
0.15
IOUT
Output load current
â
GM
Gain margin
â
PM
Phase margin
50
Vn
Voltage noise density (noise floor) 1kHz
â
Vn
Voltage noise density (noise floor) 10kHz
â
Typ.
60
280
±3
10
±200
±300
â
17
TBD
â
â
â
â
â
â
â
â
±0.5
20
60
280
100
Max.
â
â
TBD
TBD
TBD
TBD
â
â
â
â
â
â
â
â
â
â
VDD-0.15
â
â
â
â
â
Unit
μA
μA
mV
μV/C
pA
pA
MΩ
pF
MΩ
dB
dB
V/μs
V/μs
MHz
MHz
dB
V
mA
dB
deg
nV/âHz
nV/âHz
Figure 20. Typical Open Loop Gain vs. Frequency [TBD]
Figure 21. Typical Phase vs. Frequency [TBD]
Notes
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
54
Preliminary
Freescale Semiconductor, Inc.
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