MC9S08QD4 Datasheet, PDF (68/202 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 5 Resets, Interrupts, and General System Control
Table 5-13. SPMSC2 Register Field Descriptions
Field
Description
7
LVWF
6
LVWACK
5
LVDV
4
LVWV
3
PPDF
2
PPDACK
0
PPDC
Low-Voltage Warning Flag — The LVWF bit indicates the low voltage warning status.
0 Low voltage warning not preset.
1 Low voltage warning is present or was present.
Low-Voltage Warning Acknowledge — The LVWACK bit is the low-voltage warning acknowledge.
Writing a 1 to LVWACK clears LVWF to a 0 if a low voltage warning is not present.
Low-Voltage Detect Voltage Select — The LVDV bit selects the LVD trip point voltage (V_LVD).
0 Low trip point selected (V_LVD = V_LVDL).
1 High trip point selected (V_LVD = V_LVDH).
Low-Voltage Warning Voltage Select — The LVWV bit selects the LVW trip point voltage (V_LVW).
0 Low trip point selected (V_LVW = V_LVWL).
1 High trip point selected (V_LVW = V_LVWH).
Partial Power Down Flag — The PPDF bit indicates that the MCU has exited the stop2 mode.
0 Not stop2 mode recovery.
1 Stop2 mode recovery.
Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit.
Partial Power Down Control — The write-once PPDC bit controls whether stop2 or stop3 mode is selected.
0 Stop3 mode enabled.
1 Stop2, partial power down, mode enabled.
MC9S08QD4 Series MCU Data Sheet, Rev. 3
68
Freescale Semiconductor