MC9S08QD4 Datasheet, PDF (49/202 Pages) Freescale Semiconductor, Inc – Microcontrollers

4.7.3
Chapter 4 Memory Map and Register Definition
Flash Configuration Register (FCNFG)
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
KEYACC
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-7. Flash Configuration Register (FCNFG)
Table 4-10. FCNFG Register Field Descriptions
Field
Description
5
KEYACC
Enable Writing of Access Key — This bit enables writing of the backdoor comparison key. For more detailed
information about the backdoor key mechanism, refer to Section 4.6, “Security.”
0 Writes to 0xFFB0–0xFFB7 are interpreted as the start of a flash programming or erase command.
1 Writes to NVBACKKEY (0xFFB0–0xFFB7) are interpreted as comparison key writes.
4.7.4 Flash Protection Register (FPROT and NVPROT)
During reset, the contents of the nonvolatile location NVPROT is copied from flash into FPROT. This
register can be read at any time, but user program writes have no meaning or effect.
7
6
5
4
3
2
1
R
FPS⁽¹⁾
W
Reset
This register is loaded from nonvolatile location NVPROT during reset.
1 _{Background commands can be used to change the contents of these bits in FPROT.}
Figure 4-8. Flash Protection Register (FPROT)
0
FPDIS⁽¹⁾
Field
7:1
FPS
0
FPDIS
Table 4-11. FPROT Register Field Descriptions
Description
Flash Protect Select Bits — When FPDIS = 0, this 7-bit field determines the ending address of unprotected
flash locations at the high address end of the flash. Protected flash locations cannot be erased or programmed.
Flash Protection Disable
0 Flash block specified by FPS7:FPS1 is block protected (program and erase not allowed).
1 No flash block is protected.
MC9S08QD4 Series MCU Data Sheet, Rev. 3
Freescale Semiconductor
49