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MC9S08QD4 Datasheet, PDF (186/202 Pages) Freescale Semiconductor, Inc – Microcontrollers
Appendix A Electrical Characteristics
A.7 Internal Clock Source Characteristics
Table A-7. Internal Clock Source Specifications
Characteristic
Symbol
Min
Typ1
Max Unit
Average internal reference frequency - untrimmed
Average internal reference frequency - trimmed
DCO output frequency range - untrimmed
DCO output frequency range - trimmed
Resolution of trimmed DCO output frequency at fixed voltage and
temperature (Consumer and Industrial MC9S08QDx)2
fint_ut
fint_t
fdco_ut
fdco_t
25
31.25 41.66 kHz
—
31.25
—
kHz
12.8
16
21.33 MHz
—
16
—
MHz
—
—
± 0.2
Resolution of trimmed DCO output frequency at fixed voltage and
Δfdco_res_t
temperature (Automotive S9S08QDx)2
—
–40°C to 0°C
0 to 125°C
%fdco
—
± 0.3
± 0.2
Total deviation of trimmed DCO output frequency over voltage and
temperature 2
Consumer and Industrial MC9S08QDx
Δfdco_t
—
—
±2
%fdco
Automotive S9S08QDx
±3
FLL acquisition time 2,3
tacquire
1
ms
Long term Jitter of DCO output clock (averaged over 2 ms interval) 4
CJitter
—
—
0.6
%fdco
1 Data in Typical column was characterized at 3.0 V and 3.0 V, 25°C or is typical recommended value.
2 Characterized, but not tested.
3 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
4 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBUS.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for
a given interval.
MC9S08QD4 Series MCU Data Sheet, Rev. 3
186
Freescale Semiconductor