MC9S08QD4 Datasheet, PDF (66/202 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 5 Resets, Interrupts, and General System Control
Table 5-11. Real-Time Interrupt Period
RTIS2:RTIS1:RTIS0
Using Internal 1 kHz Clock Source^{1 2}
Using 32 kHz ICS Clock Source
Period = t_ext3
0:0:0
Disable RTI
Disable RTI
0:0:1
8 ms
t_ext × 256
0:1:0
32 ms
t_ext × 1024
0:1:1
64 ms
t_ext × 2048
1:0:0
128 ms
t_ext × 4096
1:0:1
256 ms
t_ext × 8192
1:1:0
512 ms
t_ext × 16384
1:1:1
1.024 s
t_ext × 32768
1 _{Values are shown in this column based on tRTI = 1 ms. See tRTI in the Section A.8.1, “Control Timing,” for the tolerance of this}
value.
2 _{The initial RTI timeout period will be up to one 1 kHz clock period less than the time specified.}
3 _{text is the period of the 32 kHz ICS frequency.}
5.8.8 System Power Management Status and Control 1 Register
(SPMSC1)
This high-page register contains status and control bits to support the low voltage detect function, and to
enable the bandgap voltage reference for use by the ADC module. To configure the low voltage detect trip
voltage, see Table 5-13 for the LVDV bit description in SPMSC2.
1
7
6
5
4
3
2
1
R LVDF
0
0
LVDIE
LVDRE²
LVDSE
LVDE ²
W
LVDACK
Reset:
0
0
0
1
1
1
0
= Unimplemented or Reserved
1 _{Bit 1 is a reserved bit that must always be written to 0.}
2 _{This bit can be written only one time after reset. Additional writes are ignored.}
Figure 5-10. System Power Management Status and Control 1 Register (SPMSC1)
0
BGBE
0
Table 5-12. SPMSC1 Register Field Descriptions
Field
Description
7
LVDF
6
LVDACK
Low-Voltage Detect Flag — Provided LVDE = 1, this read-only status bit indicates a low-voltage detect event.
Low-Voltage Detect Acknowledge — This write-only bit is used to acknowledge low voltage detection errors
(write 1 to clear LVDF). Reads always return 0.
MC9S08QD4 Series MCU Data Sheet, Rev. 3
66
Freescale Semiconductor