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MC9S08QD4 Datasheet, PDF (19/202 Pages) Freescale Semiconductor, Inc – Microcontrollers
1.2.1
MCU Block Diagram
HCS08 CORE
BKGD/MS
IRQ
CPU
BDC
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
RTI
COP
IRQ
LVD
USER FLASH
4096 / 2048 BYTES
USER RAM
256 / 128 BYTES
4-BIT KEYBOARD
INTERRUPT MODULE (KBI)
1-CH 16-BIT TIMER/PWM
MODULE (TPM2)
2-CH 16-BIT TIMER/PWM
MODULE (TPM1)
4
TPM2CH0
TCLK2
TPM1CH0
TPM1CH1
TCLK1
10-BIT
ANALOG-TO-DIGITAL
4
CONVERTER (ADC)
Chapter 1 Device Overview
PTA5/TPM2CH0I/IRQ/RESET
PTA4/TPM2CH0O/BKGD/MS
PTA3/KBI1P3/TCLK2/ADC1P3
PTA2/KBI1P2/TCLK1/ADC1P2
PTA1/KBI1P1/TPM1CH1/ADC1P1
PTA0/KBI1P0/TPM1CH0/ADC1P0
16 MHz INTERNAL CLOCK
SOURCE (ICS)
VSS
VDD
VOLTAGE REGULATOR
VDDA
VSSA
VREFH
VREFL
NOTES:
1 Port pins are software configurable with pullup device if input port.
2 Port pins are software configurable for output drive strength.
3 Port pins are software configurable for output slew rate control.
4 IRQ contains a software configurable (IRQPDD) pullup/pulldown device if PTA5 enabled as IRQ pin function (IRQPE = 1).
5 RESET contains integrated pullup device if PTA5 enabled as reset pin function (RSTPE = 1).
6 PTA5 does not contain a clamp diode to VDD and must not be driven above VDD. The voltage measured on this pin when
internal pullup is enabled may be as low as VDD – 0.7 V. The internal gates connected to this pin are pulled to VDD.
7 PTA4 contains integrated pullup device if BKGD enabled (BKGDPE = 1).
8 When pin functions as KBI (KBIPEn = 1) and associated pin is configured to enable the pullup device, KBEDGn can be used
to reconfigure the pullup as a pulldown device.
Figure 1-1. MC9S08QD4 Series Block Diagram
Table 1-2 provides the functional versions of the on-chip modules.
MC9S08QD4 Series MCU Data Sheet, Rev. 3
Freescale Semiconductor
19