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MC9S08DE60 Datasheet, PDF (60/412 Pages) Freescale Semiconductor, Inc – Microcontrollers
Chapter 4 Memory
Table 4-8. Flash and EEPROM Clock Divider Settings
fBus
20 MHz
10 MHz
8 MHz
4 MHz
2 MHz
1 MHz
200 kHz
150 kHz
PRDIV8
(Binary)
1
0
0
0
0
0
0
0
DIV
(Decimal)
12
49
39
19
9
4
0
0
fFCLK
192.3 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
150 kHz
Program/Erase Timing Pulse
(5 μs Min, 6.7 μs Max)
5.2 μs
5 μs
5 μs
5 μs
5 μs
5 μs
5 μs
6.7 μs
4.5.12.2 Flash and EEPROM Options Register (FOPT and NVOPT)
During reset, the contents of the nonvolatile location NVOPT are copied from Flash into FOPT. To change
the value in this register, erase and reprogram the NVOPT location in Flash memory as usual and then issue
a new MCU reset.
R
W
Reset
7
KEYEN
F
6
5
4
3
2
1
0
FNORED EPGMOD
0
0
0
SEC
F
F
0
0
0
F
F
= Unimplemented or Reserved
F = loaded from nonvolatile location NVOPT during reset
Figure 4-6. Flash and EEPROM Options Register (FOPT)
Table 4-9. FOPT Register Field Descriptions
Field
Description
7
KEYEN
Backdoor Key Mechanism Enable — When this bit is 0, the backdoor key mechanism cannot be used to
disengage security. The backdoor key mechanism is accessible only from user (secured) firmware. BDM
commands cannot be used to write key comparison values that would unlock the backdoor key. For more detailed
information about the backdoor key mechanism, refer to Section 4.5.9, “Security.”
0 No backdoor key access allowed.
1 If user firmware writes an 8-byte value that matches the nonvolatile backdoor key (NVBACKKEY through
NVBACKKEY+7 in that order), security is temporarily disengaged until the next MCU reset.
6
FNORED
Vector Redirection Disable — When this bit is 1, then vector redirection is disabled.
0 Vector redirection enabled.
1 Vector redirection disabled.
MC9S08DE60 Series Data Sheet, Rev. 3
60
Freescale Semiconductor