MC9S08DE60 Datasheet, PDF (25/412 Pages) Freescale Semiconductor, Inc – Microcontrollers

1 kHZ
LPO
MCGERCLK
MCGIRCLK
TPM1CLK TPM2CLK
RTC
COP
TPM1
TPM2
IIC
MCG
MCGFFCLK
÷2
FFCLK*
Chapter 1 Device Overview
SCI1
SCI2
SPI
MCGOUT
MCGLCLK
÷2 ^BUSCLK
XOSC
CPU
BDC
EXTAL XTAL
* The fixed frequency clock (FFCLK) is internally
synchronized to the bus clock and must not exceed one half
of the bus clock frequency.
ADC
MSCAN FLASH EEPROM
ADC has min and max
frequency requirements.
See the ADC chapter
and electricals appendix
for details.
Flash and EEPROM have
frequency requirements
for program and erase
operation. See the
electricals appendix for
details.
Figure 1-2. MC9S08DE60/32 System Clock Distribution Diagram
MC9S08DE60 Series Data Sheet, Rev. 3
Freescale Semiconductor
25