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MC9S12P64CFT Datasheet, PDF (55/566 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Port Integration Module (S12PPIMV1)
Table 2-2. Block Memory Map (continued)
Port
Offset or
Address
Register
Access Reset Value Section/Page
J 0x0268 PTJâPort J Data Register
R/W
0x0269 PTIJâPort J Input Register
R
0x026A DDRJâPort J Data Direction Register
R/W
0x026B RDRJâPort J Reduced Drive Register
R/W
0x026C PERJâPort J Pull Device Enable Register
R/W
0x026D PPSJâPort J Polarity Select Register
R/W
0x026E PIEJâPort J Interrupt Enable Register
R/W
0x026F PIFJâPort J Interrupt Flag Register
R/W
AD 0x0270 PT0ADâPort AD Data Register
R
0x0271 PT1ADâPort AD Data Register
R/W
0x0272 DDR0ADâPort AD Data Direction Register
R
0x0273 DDR1ADâPort AD Data Direction Register
R/W
0x0274 RDR0ADâPort AD Reduced Drive Register
R
0x0275 RDR1ADâPort AD Reduced Drive Register
R/W
0x0276 PER0ADâPort AD Pull Up Enable Register
R
0x0277 PER1ADâPort AD Pull Up Enable Register
R/W
0x0278 PIM Reserved
R
:
0x027F
1. Write access not applicable for one or more register bits. Refer to register description.
2. Refer to device memory map to determine related module.
3. Mode dependent.
4. Read always returns logic level on pins.
0x00
4
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
2.3.49/2-92
2.3.50/2-93
2.3.51/2-93
2.3.52/2-94
2.3.53/2-94
2.3.54/2-95
2.3.55/2-95
2.3.56/2-96
2.3.57/2-96
2.3.58/2-97
2.3.59/2-97
2.3.60/2-98
2.3.61/2-98
2.3.62/2-99
2.3.62/2-99
2.3.64/2-100
2.3.65/2-100
Register
Name
Bit 7
6
5
4
0x0000 R
PORTA W
PA7
PA6
PA5
PA4
0x0001 R
PORTB W
PB7
PB6
PB5
PB4
0x0002 R
DDRA W DDRA7
DDRA6
DDRA5
DDRA4
0x0003 R
DDRB W DDRB7
DDRB6
DDRB5
DDRB4
= Unimplemented or Reserved
3
PA3
PB3
DDRA3
DDRB3
2
PA2
PB2
DDRA2
DDRB2
1
PA1
PB1
DDRA1
DDRB1
Bit 0
PA0
PB0
DDRA0
DDRB0
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
55
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