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K10P81M72SF1 Datasheet, PDF (46/73 Pages) Freescale Semiconductor, Inc – K10 Sub-Family | |||
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Peripheral operating requirements and behaviors
6.6.1.4 16-bit ADC with PGA characteristics with Chop enabled
(ADC_PGA[PGACHPb] =0)
Table 28. 16-bit ADC with PGA characteristics
Symbol
IDDA_PGA
IDC_PGA
Description
Supply current
Input DC current
Conditions
Low power
(ADC_PGA[PGALPb]=0)
Min.
Typ.1
Max.
Unit
â
420
644
μA
A
Notes
2
3
G
Gain4
BW
PSRR
Input signal
bandwidth
Power supply
rejection ratio
Gain =1, VREFPGA=1.2V,
VCM=0.5V
Gain =64, VREFPGA=1.2V,
VCM=0.1V
⢠PGAG=0
⢠PGAG=1
⢠PGAG=2
⢠PGAG=3
⢠PGAG=4
⢠PGAG=5
⢠PGAG=6
⢠16-bit modes
⢠< 16-bit modes
Gain=1
â
1.54
â
0.57
0.95
1
1.9
2
3.8
4
7.6
8
15.2
16
30.0
31.6
58.8
63.3
â
â
â
â
â
-84
CMRR Common mode
rejection ratio
⢠Gain=1
⢠Gain=64
â
-84
â
-85
VOFS
Input offset
voltage
TGSW
Gain switching
settling time
dG/dT
Gain drift over full
temperature
range
dG/dVDDA Gain drift over
supply voltage
â
0.2
â
â
⢠Gain=1
⢠Gain=64
â
6
â
31
⢠Gain=1
⢠Gain=64
â
0.07
â
0.14
Table continues on the next page...
â
μA
â
μA
1.05
2.1
4.2
8.4
16.6
33.2
67.8
4
40
â
â
â
â
10
RAS < 100Ω
kHz
kHz
dB
VDDA= 3V
±100mV,
fVDDA= 50Hz,
60Hz
dB
VCM=
dB
500mVpp,
fVCM= 50Hz,
100Hz
mV Output offset =
VOFS*(Gain+1)
µs
5
10
42
0.21
0.31
ppm/°C
ppm/°C
%/V VDDA from 1.71
%/V
to 3.6V
K10 Sub-Family Data Sheet, Rev. 2, 4/2012.
46
Freescale Semiconductor, Inc.
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