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K10P81M72SF1 Datasheet, PDF (22/73 Pages) Freescale Semiconductor, Inc – K10 Sub-Family
Peripheral operating requirements and behaviors
2.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air) with the single layer board horizontal. For the LQFP, the board meets the
JESD51-3 specification. For the MAPBGA, the board meets the JESD51-9 specification.
3.
Determined according to JEDEC Standard JESD51-6, Integrated Circuits Thermal Test Method Environmental
Conditions—Forced Convection (Moving Air) with the board horizontal. For the LQFP, the board meets the JESD51-7
specification.
4.
Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board. Board temperature is measured on the top surface of the board near the package.
5.
Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
6.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
6 Peripheral operating requirements and behaviors
6.1 Core modules
6.1.1 Debug trace timing specifications
Table 11. Debug trace operating behaviors
Symbol
Tcyc
Twl
Twh
Tr
Tf
Ts
Th
Description
Clock period
Low pulse width
High pulse width
Clock and data rise time
Clock and data fall time
Data setup
Data hold
Min.
Max.
Frequency dependent
2
—
2
—
—
3
—
3
3
—
2
—
Unit
MHz
ns
ns
ns
ns
ns
ns
Figure 4. TRACE_CLKOUT specifications
K10 Sub-Family Data Sheet, Rev. 2, 4/2012.
22
Freescale Semiconductor, Inc.