MSC7118 Datasheet, PDF (41/60 Pages) Freescale Semiconductor, Inc – Low-Cost 16-bit DSP with DDR Controller

3.2.2.1 Case 1
The power-up sequence is as follows:
1. Turn on the V_DDIO (3.3 V) supply first.
2. Turn on the V_DDC (1.2 V) supply second.
3. Turn on the V_DDM (2.5 V) supply third.
4. Turn on the V_REF (1.25 V) supply fourth (last).
Hardware Design Considerations
The power-down sequence is as follows:
1. Turn off the V_REF (1.25 V) supply first.
2. Turn off the V_DDM (2.5 V) supply second.
3. Turn off the V_DDC (1.2 V) supply third.
4. Turn of the V_DDIO (3.3 V) supply fourth (last).
Use the following guidelines:
• Make sure that the time interval between the ramp-down of V_DDIO and V_DDC is less than 10 ms.
• Make sure that the time interval between the ramp-up or ramp-down for V_DDC and V_DDM is less than 10 ms for
power-up and power-down.
• Refer to Figure 26 for relative timing for power sequencing case 1.
Ramp-up
Ramp-down
V_DDIO = 3.3 V
V_DDM = 2.5 V
<10 ms
<10 ms
<10 ms
<10 ms
Time
Figure 26. Voltage Sequencing Case 1
V_REF = 1.25 V
V_DDC = 1.2 V
MSC7118 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 7
Freescale Semiconductor
41