MSC7118 Datasheet, PDF (20/60 Pages) Freescale Semiconductor, Inc – Low-Cost 16-bit DSP with DDR Controller

Electrical Characteristics
Table 5. DC Electrical Characteristics (continued)
Characteristic
Symbol
Min
Typical
Max
Unit
Tri-state (high impedance off state) leakage current,
I_OZ
V_IN = V_DDIO
Signal low input current, V_IL = 0.4 V
I_L
Signal high input current, V_IH = 2.0 V
I_H
Output high voltage, I_OH = –2 mA, except open drain pins
V_OH
Output low voltage, I_OL= 5 mA
V_OL
Typical power at 300 MHz⁵
P
–1.0
0.09
–1.0
0.09
–1.0
0.09
2.0
3.0
—
0
—
324.0
1
µA
1
µA
1
µA
—
V
0.4
V
—
mW
Notes: 1. The value of V_DDM at the MSC7118 device must remain within 50 mV of V_DDM at the DRAM device at all times.
2. V_REF must be equal to 50% of V_DDM and track V_DDM variations as measured at the receiver. Peak-to-peak noise must not
exceed ±2% of the DC value.
3. V_TT is not applied directly to the MSC7118 device. It is the level measured at the far end signal termination. It should be equal
to V_REF. This rail should track variations in the DC level of V_REF.
4. Output leakage for the memory interface is measured with all outputs disabled, 0 V ≤ V_OUT ≤ V_DDM.
5. The core power values were measured.using a standard EFR pattern at typical conditions (25°C, 300 MHz, 1.2 V core).
Table 6 lists the DDR DRAM capacitance.
Table 6. DDR DRAM Capacitance
Parameter/Condition
Input/output capacitance: DQ, DQS
Delta input/output capacitance: DQ, DQS
Note:
These values were measured under the following conditions:
• V_DDM = 2.5 V ± 0.125 V
• f = 1 MHz
• T_A = 25°C
• V_OUT = V_DDM/2
• V_OUT (peak to peak) = 0.2 V
Symbol
C_IO
C_DIO
Max
30
30
Unit
pF
pF
MSC7118 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 7
20
Freescale Semiconductor