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K20P120M100SF2 Datasheet, PDF (41/66 Pages) Freescale Semiconductor, Inc – K20 Data Sheet
Peripheral operating requirements and behaviors
Figure 14. Typical ENOB vs. ADC_CLK for 16-bit single-ended mode
6.6.1.3 16-bit ADC with PGA operating conditions
Table 29. 16-bit ADC with PGA operating conditions
Symbol
VDDA
VREFPGA
Description
Supply voltage
PGA ref voltage
Conditions
Absolute
VADIN
VCM
RPGAD
RAS
TS
Input voltage
Input Common
Mode range
Differential input
impedance
Analog source
resistance
ADC sampling
time
Gain = 1, 2, 4, 8
Gain = 16, 32
Gain = 64
Min.
Typ.1
Max.
1.71
—
3.6
VREF_OU VREF_OU VREF_OU
T
T
T
VSSA
—
VDDA
VSSA
—
VDDA
—
128
—
—
64
—
—
32
—
—
100
—
1.25
—
—
Unit
V
V
V
V
kΩ
Ω
µs
Table continues on the next page...
Notes
2, 3
IN+ to IN-4
5
6
K20 Data Sheet Data Sheet, Rev. 6.1, 08/2012.
Freescale Semiconductor, Inc.
41