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K20P120M100SF2 Datasheet, PDF (38/66 Pages) Freescale Semiconductor, Inc – K20 Data Sheet
Peripheral operating requirements and behaviors
1. Typical values assume VDDA = 3.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2. DC potential difference.
3. This resistance is external to MCU. The analog source resistance must be kept as low as possible to achieve the best
results. The results in this data sheet were derived from a system which has < 8 Ω analog source resistance. The RAS/CAS
time constant should be kept to < 1ns.
4. To use the maximum ADC conversion clock frequency, the ADHSC bit must be set and the ADLPC bit must be clear.
5. For guidelines and examples of conversion rate calculation, download the ADC calculator tool: http://cache.freescale.com/
files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
ZAS
RAS
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
Pad
leakage
due to
input
protection
ZADIN
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
RADIN
ADC SAR
ENGINE
VADIN
VAS
CAS
INPUT PIN
INPUT PIN
INPUT PIN
RADIN
RADIN
RADIN
CADIN
Figure 12. ADC input impedance equivalency diagram
6.6.1.2 16-bit ADC electrical characteristics
Table 28. 16-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA)
Symbol Description
Conditions1
Min.
Typ.2
Max.
Unit
IDDA_ADC Supply current
0.215
—
ADC
• ADLPC = 1, ADHSC = 0 1.2
2.4
fADACK
asynchronous
clock source
• ADLPC = 1, ADHSC = 1 2.4
• ADLPC = 0, ADHSC = 0 3.0
4.0
5.2
• ADLPC = 0, ADHSC = 1 4.4
6.2
1.7
mA
3.9
MHz
6.1
MHz
7.3
MHz
9.5
MHz
TUE
Sample Time
Total unadjusted
error
See Reference Manual chapter for sample times
• 12-bit modes
—
±4
• <12-bit modes
—
±1.4
±6.8
±2.1
LSB4
Table continues on the next page...
Notes
3
tADACK = 1/
fADACK
5
K20 Data Sheet Data Sheet, Rev. 6.1, 08/2012.
38
Freescale Semiconductor, Inc.