K20P120M100SF2 Datasheet, PDF (26/66 Pages) Freescale Semiconductor, Inc – K20 Data Sheet

Peripheral operating requirements and behaviors
6.3.1 MCG specifications
Table 15. MCG specifications
Symbol Description
Min.
f_{ints_ft} Internal reference frequency (slow clock) —
—
factory trimmed at nominal VDD and 25 °C
f_{ints_t}
Internal reference frequency (slow clock) — user
trimmed
31.25
Δ_{fdco_res_t} Resolution of trimmed average DCO output
—
frequency at fixed voltage and temperature —
using SCTRIM and SCFTRIM
Δf_{dco_t} Total deviation of trimmed average DCO output
—
frequency over fixed voltage and temperature
range of 0–70°C
f_{intf_ft} Internal reference frequency (fast clock) —
—
factory trimmed at nominal VDD and 25°C
f_{intf_t} Internal reference frequency (fast clock) — user
3
trimmed at nominal VDD and 25 °C
f_{loc_low}
f_{loc_high}
Loss of external clock minimum frequency —
RANGE = 00
Loss of external clock minimum frequency —
RANGE = 01, 10, or 11
(3/5) x
f_{ints_t}
(16/5) x
f_{ints_t}
FLL
f_{fll_ref}
f_dco
FLL reference frequency range
DCO output
frequency range
Low range (DRS=00)
640 × f_{fll_ref}
Mid range (DRS=01)
31.25
20
40
1280 × f_{fll_ref}
Mid-high range (DRS=10)
60
1920 × f_{fll_ref}
High range (DRS=11)
80
f_{dco_t_DMX32} DCO output
frequency
2560 × f_{fll_ref}
Low range (DRS=00)
—
732 × f_{fll_ref}
Mid range (DRS=01)
—
1464 × f_{fll_ref}
Mid-high range (DRS=10)
—
2197 × f_{fll_ref}
High range (DRS=11)
—
J_{cyc_fll}
t_{fll_acquire}
FLL period jitter
2929 × f_{fll_ref}
• f_VCO = 48 MHz
• f_VCO = 98 MHz
FLL target frequency acquisition time
—
—
—
PLL
Typ.
32.768
—
± 0.3
± 1.5
4
—
—
—
—
20.97
41.94
62.91
83.89
23.99
47.97
71.99
95.98
180
150
—
Table continues on the next page...
Max.
—
38.2
± 0.6
± 4.5
—
5
—
—
39.0625
25
50
75
100
—
—
—
—
—
—
1
Unit
kHz
kHz
%f_dco
%f_dco
MHz
MHz
kHz
kHz
kHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ps
ms
Notes
1
1
2, 3
4, 5
6
K20 Data Sheet Data Sheet, Rev. 6.1, 08/2012.
26
Freescale Semiconductor, Inc.