33813 Datasheet, PDF (38/54 Pages) Freescale Semiconductor, Inc – One Cylinder Small Engine Control IC

5.3.4 NORMAL State
The default NORMAL state is entered when power is applied to the VPWR and the KEYSW pins.
Note that the device is designed to have V_PWR present before KEYSW is brought high. It is acceptable to bring VPWR and
KEYSW high simultaneously, however it is not recommended to bring KEYSW high while VPWR is low.
SPI register settings from Power-ON Reset (POR) are as follows:
• All outputs turned off.
• Off State open load detection enabled (LSD)
• Default values in the SPI Configuration, Control, and Status registers.
5.3.5 Power On Self-test (POST)
At power on, after a POR, it may be desired to go through an initial Power On Self-test routine to ensure that the SPI is working
correctly and the status registers in the 33813 are viable. After a POR, all the registers in the 33813 contain their “default” values,
as indicated in the SPI register tables later in this document. The watchdog is also set to its default timeout value of 10 seconds,
so any POST routine must be accomplished within this time frame or a WD reset may occur. To perform a POST routine, the
MCU should first send a SPI message to set the POST enable bit in the SPI control register 1, bit 6. Once this bit is set, the status
registers are disconnected from the analog and logic portions of the 33813, and are connected only to the SPI circuitry. The POST
can then write various data patterns to the status registers and verify that none of the bits are “stuck” or otherwise unworking.
Note that bits in the status register labelled “x” are not implemented and when testing these bits may result in erroneous data.
After testing all the status registers and confirming that they are viable, the status registers can be set back to their default values
by clearing the POST Enable bit back to 0. The POST enable bit allows the MCU to write ones (1s) to the Status registers.
Normally, the status register can only be cleared to zeros by the MCU and written ones by the 33813 internal logic. This was
designed to prevent the MCU from missing any reported fault bits, and for the 33813, to prevent system status errors that could
result from the MCU erroneously writing a one (1) to a fault bit.
Once the POST enable bit is set back to a zero (0) by the MCU, the Status register returns to the condition where the 33813 can
only write ones(1s) to it and the MCU can only write zeros (0s) to it.
Again, it is important to note that any POST routine should be designed to take less than 10 seconds to avoid a watchdog reset
from occurring and truncating the POST routine because the WD reset will clear the POST Enable bit as well.
The 33813 IC has two modes of operation, Normal mode, and Sleep mode.
5.3.6 Watchdog (WD)
5.3.6.1 Watchdog Normal Operation
The watchdog is a programmable timer that is used to monitor the operation of the MCU. When the MCU is executing code
properly, it’s program code should contain instructions to periodically send a SPI message to the watchdog SPI control register
to refresh the watchdog. The watchdog timer, once refreshed, will reload the time interval value stored in the SPI watchdog
configuration register and begin counting time again. Under normal operating conditions this sequence will continue until the
MCU shuts down, typically, when the KEYSW is turned off.
5.3.6.2 Watchdog Fault Operation
In the event that something goes wrong during the MCU program execution, such as an unexpected breakpoint or other program
hang-up such as the execution of a HALT instruction, the watchdog may not be refreshed. When the WD time interval value
programmed in the SPI Configuration register elapses, the watchdog will issue a RESETB pulse. This RESETB pulse will cause
the MCU to restart it’s program and correct operation should be restored.
After any RESETB (power-on or other), the watchdog SPI configuration register will contain the default value for the refresh time,
10 seconds. The watchdog is also enabled by default.
The MCU, in it’s initialization (start-up) code, can choose to change this default value and/or disable the watchdog by sending a
SPI command to write new information in the watchdog SPI configuration register.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33813
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