33813 Datasheet, PDF (25/54 Pages) Freescale Semiconductor, Inc – One Cylinder Small Engine Control IC

5.1.6 GND
The GND pin provides the ground reference for the V_PWR, V_PP, V_PROT and V_CC supplies. The GND pin is used as a return for
both the power supplies as well as power ground for some of the lower current output drivers. The higher current output drivers
have their own ground pins. All ground pins (INJGND1, INJGND2, RGND1, and RGND2) and the exposed pad must be directly
connected to this pin and the negative battery terminal. There is no separate ground pin associated with the LAMPOUT driver,
it shares a ground with ROUT2.
5.1.7 SCLK Input
The serial clock (SCLK) pin clocks the internal SPI shift register of the 33813. The SI data is latched into the input shift register
on the rising edge of SCLK signal. The SO pin shifts status bits out on the falling edge of SCLK. The SO data is available for the
MCU to read on the rising edge of SCLK. With CSB in a logic high state, signals on the SCLK and SI pins will be ignored and the
SO pin will be in a high-impedance state. The SCLK signal consists of a 50% duty cycle with CMOS logic levels referenced to
V_CC. All SPI transfers consist of exactly 16 SCLK pulses. If any more or less than 16 clock pulses are received within one frame
of CSB going low and then high, a SPI error is reported in the SPI Status Register. The SPI error bit will also be set whenever
an invalid SPI message is received, even though it may contain 16-bits.
5.1.8 CSB Input
The system MCU selects which slave is 33813 to receive SPI communication using separate chip select (CSB) pins. With the
CSB in a logic low state, SPI words may be sent to the 33813 via the serial input (SI) pin, and status information is received by
the MCU via the serial output (SO) pin. The falling edge of CSB enables the SO output and transfers status information into the
SO buffer.
The rising edge of the CSB initiates the following operation:
1. Disables the SO driver (high-impedance)
2. Activates the received command word, allowing the 33813 to activate/deactivate output drivers.
To avoid any spurious data, it is essential that the high-to-low and low-to-high transitions of the CSB signal occur only when SCLK
is in a logic low state. Internal to the 33813 device is an active pull-up to V_CC on CSB. In cases where voltage exists on CSB
without the application of V_CC, no current will flow from CSB to the VCC pin. This input requires CMOS logic levels referenced
to V_CC and has an internal active pull-up current source.
5.1.9 SI Input
The SI pin is used for serial instruction data input. SI information is latched into the input register on the rising edge of SCLK and
the input data transitions on the falling edge of SCLK. A logic high state present on SI will program a one in the command word
on the rising edge of the CSB signal. To program a complete word, 16 bits of information must be entered into the device. This
input requires CMOS logic levels referenced to V_CC.
5.1.10 SO Output
The SO pin is the output from the SPI shift register. The SO pin remains high-impedance until the CSB pin transitions to a logic
low state. All normal operating drivers are reported as zero, all faulted drivers are reported as one. The negative transition of CSB
enables the SO driver.
The SI / SO shifting of the data follows a first-in-first-out protocol, with both input and output words transferring the most significant
bit (MSB) first.
The serial output data is available to be latched by the MCU on the rising edge of SCLK. The SO data transitions on falling edge
of the SCLK. This output provides CMOS logic levels referenced to V_CC.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33813
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