S12FTS128KV1 Datasheet, PDF (32/46 Pages) Freescale Semiconductor, Inc – 128k byte Flash (Non-Volatile) Memory

Block Guide — FTS128K V01.0^F3^{reescale Semiconductor, Inc.}
WARNING
Because of the impact of clock synchronization on the accuracy of the functional timings,
programming or erasing the Flash cannot be performed if the bus clock runs at less than 1 MHz.
Programming or erasing the Flash with an input clock < 150kHz should be avoided. Setting
FCLKDIV to a value such that FCLK < 150kHz can destroy the Flash due to overstress. Setting
FCLKDIV to a value such that (1/FCLK+Tbus) < 5µs can result in incomplete programming or
erasure of the memory array cells.
If the FCLKDIV register is written, the bit FDIVLD is set automatically. If this bit is zero, the register has
not been written since the last reset. Program and erase commands will not be executed if this register has
not been written to.
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