S12FTS128KV1 Datasheet, PDF (22/46 Pages) Freescale Semiconductor, Inc – 128k byte Flash (Non-Volatile) Memory

Block Guide — FTS128K V01.0^F3^{reescale Semiconductor, Inc.}
Figure 3-3 Flash Security Register (FSEC)
All bits in the FSEC register are readable but not writable.
The FSEC register is loaded from the Flash Protection/Options field byte at $FF0F during the reset
sequence, indicated by “F” in Figure 3-3.
KEYEN — Enable backdoor key to security.
1 = backdoor to Flash is enabled.
0 = backdoor to Flash is disabled.
NV[6:2] — Non Volatile Flag Bits.
These 5 bits are available to the user as non-volatile flags.
SEC[1:0] — Memory Security Bits.
The SEC[1:0] bits define the security state of the device as shown in Table 3-4. If the Flash is
unsecured using the Backdoor Key Access, the SEC bits are forced to 10.
Table 3-4 Security States
SEC[1:0]
00
01
10
11
Description
secured
secured
unsecured
secured
The security function in the Flash module is described in section 4.5.
3.3.3 FTSTMOD — Flash Test Mode Register
The unbanked FTSTMOD register is used primarily to control the NVM Test modes.
Register address BASE + $102
7
6
5
4
3
2
1
0
R
N/A
N/A
N/A WRALL
0
0
0
N/A
W
Reset: 0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-4 fts128k Test Mode Register (FTSTMOD)
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