MC68HC908QY4CDW Datasheet, PDF (29/184 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Section
Addr.
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
↓
$0035
Register Name
TIM Counter Register Low
(TCNTL)
See page 128.
TIM Counter Modulo
Register High (TMODH)
See page 129.
TIM Counter Modulo
Register Low (TMODL)
See page 129.
TIM Channel 0 Status and
Control Register (TSC0)
See page 130.
TIM Channel 0
Register High (TCH0H)
See page 132.
TIM Channel 0
Register Low (TCH0L)
See page 132.
TIM Channel 1 Status and
Control Register (TSC1)
See page 130.
TIM Channel 1
Register High (TCH1H)
See page 132.
TIM Channel 1
Register Low (TCH1L)
See page 132.
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Unimplemented
Bit 7
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
Bit 7
6
Bit 6
0
Bit 14
1
Bit 6
1
CH0IE
0
Bit 14
Bit 6
CH1IE
0
Bit 14
Bit 6
5
4
3
2
Bit 5
Bit 4
Bit 3
Bit 2
0
0
0
0
Bit 13
Bit 12
Bit 11
Bit 10
1
1
1
1
Bit 5
Bit 4
Bit 3
Bit 2
1
1
1
1
MS0B
MS0A
ELS0B ELS0A
0
0
0
0
Bit 13
Bit 12
Bit 11
Bit 10
Indeterminate after reset
Bit 5
Bit 4
Bit 3
Bit 2
Indeterminate after reset
0
MS1A ELS1B ELS1A
0
0
0
0
Bit 13
Bit 12
Bit 11
Bit 10
Indeterminate after reset
Bit 5
Bit 4
Bit 3
Bit 2
Indeterminate after reset
1
Bit 0
Bit 1
Bit 0
0
Bit 9
1
Bit 1
1
TOV0
0
Bit 9
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
Bit 1
Bit 0
TOV1
0
Bit 9
CH1MAX
0
Bit 8
Bit 1
Bit 0
Oscillator Status Register ^Read:
R
R
R
R
R
ECGST
R
ECGON
$0036
(OSCSTAT) Write:
See page 96. _{Reset: 0}
0
0
0
0
0
0
0
$0037
Unimplemented Read:
$0038
Oscillator Trim Register
(OSCTRIM)
See page 96.
Read:
Write:
Reset:
TRIM7
1
TRIM6 TRIM5
0
0
= Unimplemented
TRIM4 TRIM3 TRIM2 TRIM1
0
0
0
0
R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 5)
TRIM0
0
MC68HC908QY/QT Family Data Sheet, Rev. 6
Freescale Semiconductor
29