908E624_10 Datasheet, PDF (29/40 Pages) Freescale Semiconductor, Inc – Integrated Triple High Side Switch with Embedded MCU and LIN Serial Communicationfor Relay Drivers

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
SPI REGISTER OVERVIEW
Table 7 summarizes the SPI Register bit meaning, reset value, and bit reset condition.
.
Table 7. SPI Register Overview
Read / Write
Information
D7
D6
D5
Bit
D4
D3
D2
Write
Read
LINSL2
INTSRC ⁽²⁸⁾
LINSL1
LINWU
or
LINFAIL
LIN-PU
HVF
HS3ON
LVF
or
BATFAIL ⁽²⁹⁾
HS2ON
VDDT
HS1ON
HSST
Write Reset Value
0
0
0
0
0
0
Write Reset Condition
POR,
RESET
POR,
RESET
POR
POR, RESET POR,
RESET
POR,
RESET
Notes
28. D7 signals interrupts and wake-up interrupts, D6:D0 indicated the source.
29. The first SPI read after reset returns the BATFAIL flag state on bit D4.
D1
MODE2
L2
—
—
D0
MODE1
L1
—
—
SPI Control Register (Write)
Table 8 shows the SPI Control register bits by name.
Table 8. Control Bits Function (Write Operation)
D7 D6
D5
D4
D3
D2
D1
D0
LINSL2 LINSL1 LIN-PU HS3ON HS2ON HS1ON MODE2 MODE1
LINSL2 : 1 — LIN Baud Rate and Low-Power Mode
Selection Bits
These bits select the LIN slew rate and requested low-
power mode in accordance with Table 9. Reset clears the
LINSL2 : 1 bits.
Table 9. LIN Baud Rate and Low-Power Mode Selection
Bits
LINSL2 LINSL1
Description
0
0
Baud Rate up to 20 kbps (normal)
0
1
Baud Rate up to 10 kbps (slow)
1
0
Fast Program Download
Baud Rate up to 100 kbps
1
1
Low-Power Mode (Sleep or Stop) Request
LIN-PU — LIN Pullup Enable Bit
This bit controls the LIN pullup resistor during Sleep and
Stop modes.
• 1 = Pullup disconnected in Sleep and Stop modes.
• 0 = Pullup connected in Sleep and Stop modes.
In case the Pullup is disconnected a small current source
is used to pull the LIN terminal in recessive state. In case of
an erroneous short of the LIN bus to ground this will
significantly reduce the power consumption, e.g. in
combination with STOP/SLEEP mode.
HS3ON : HS1ON — High Side H3 : HS1 Enable Bits
These bits enable the HSx. Reset clears the HSxON bit.
• 1 = HSx switched on (refer to Note below).
• 0 = HSx switched off.
Note If no PWM on HS1 and HS2 is required, the PWMIN
terminal must be connected to the VDD terminal.
MODE2 : 1 — Mode Section Bits
The MODE2 : 1 bits control the operating modes and the
watchdog in accordance with Table 10.
Table 10. Mode Selection Bits
MODE2
0
0
1
MODE1
0
1
0
Description
Sleep Mode ⁽³⁰⁾
Stop Mode ⁽³⁰⁾
Watchdog Clear ⁽³¹⁾
1
1
Run (Normal) Mode
Notes
30. To enter Sleep and Stop mode, a special sequence of SPI
commands is implemented.
31. The device stays in Run (Normal) mode.
To safely enter Sleep or Stop mode and to ensure that
these modes are not affected by noise issue during SPI
transmission, the Sleep / Stop commands require two SPI
transmissions.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E624
29