908E624_10 Datasheet, PDF (13/40 Pages) Freescale Semiconductor, Inc – Integrated Triple High Side Switch with Embedded MCU and LIN Serial Communicationfor Relay Drivers

ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics (continued)
All characteristics are for the analog chip only. Please refer to the 68HC908EY16 data sheet for characteristics of the
microcontroller chip. Characteristics noted under conditions 9.0 V ≤ V_SUP ≤ 16 V, - 40°C ≤ T_J ≤ 125°C unless otherwise noted.
Typical values noted reflect the approximate parameter mean at T_A = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
LIN PHYSICAL LAYER (CONTINUED)
Output Current Shutdown Delay
SPI INTERFACE TIMING
t_OV-DELAY
—
10
—
μs
SPI Operating Recommended Frequency
L1 AND L2 INPUTS
Wake-Up Filter Time ⁽²²⁾
WINDOW WATCHDOG CONFIGURATION TERMINAL (WDCONF)
f _SPIOP
0.25
—
t _WUF
8.0
20
4.0
MHz
38
μs
Watchdog Period
External Resistor R_EXT = 10 kΩ (1%)
External Resistor R_EXT = 100 kΩ (1%)
Without External Resistor R_EXT (WDCONF Terminal Open)
t _PWD
ms
—
10.558
—
—
99.748
—
97
150
205
STATE MACHINE TIMING
Reset Low-Level Duration after V_DD High ⁽²⁶⁾
Interrupt Low-Level Duration
Normal Request Mode Timeout ⁽²⁶⁾
Delay Between SPI Command and HS1 / HS2 / HS3 Turn On ^{(23) , (24)}
Delay Between SPI Command and HS1 / HS2 / HS3 Turn Off ^{(23) , (24)}
Delay Between Normal Request and Normal Mode After W/ D Trigger
Command ⁽²⁵⁾
t _RST
0.65
1.0
1.35
ms
t _INT
7.0
10
13
μs
t _{NR TOUT}
97
150
205
ms
t _S-HSON
—
3.0
10
μs
t _S-HSOFF
—
3.0
10
μs
t _S-NR2N
6.0
35
70
μs
Delay Between SS Wake-Up (SS LOW to HIGH) and Normal Request Mode
t _W-SS
μs
(VDD On and Reset High)
15
40
80
Delay Between SS Wake-Up (SS LOW to HIGH) and First Accepted SPI
t _W-SPI
μs
Command
90
—
N/A
Delay Between Interrupt Pulse and First SPI Command Accepted
t _S-1STSPI
30
—
N/A
μs
Minimum Time Between Two Rising Edges on SS
t _2SS
15
—
—
μs
Notes
22. This parameter is guaranteed by process monitoring but is not production tested.
23. Delay between turn-on or turn-off command and high side on or high side off, excluding rise or fall time due to external load.
24. Delay between the end of the SPI command (rising edge of the SS) and start of device activation/deactivation.
25. This parameter is guaranteed by process monitoring but it is not production tested.
26. Also see Figure 10 on page 17
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E624
13