BC3770 Datasheet, PDF (27/45 Pages) Freescale Semiconductor, Inc – 2.0 A Switch-Mode Charger

7-bit
Sub Address 8-bit
7-bit
8-bit
8-bit
S
SLAVE ADDRESS
W
ACK CONTROL REGISTER ADDRESS ACK
P
S
SLAVE ADDRESS
RR
ACK
READ DATA 1
from the specified address
ACK
….
READ DATA N
from the same specified address
NA
P
Start
Write:0
Register Address 7-bit
MSB:0
Stop Start
Read:1
NACK Stop
Figure 20. Repeated Data Read from a Single Register- Split Mode
Note: A single byte read is initiated by the master with P immediately following first data byte.
Master
Slave
7-bit
Sub Address 8-bit
7-bit
8-bit
8-bit
S
SLAVE ADDRESS
W
ACK CONTROL REGISTER ADDRESS ACK
P
S
SLAVE ADDRESS
RR
ACK
READ DATA 1
from the specified address
ACK
….
READ DATA N
from the same specified address +N
NA
P
Start
Write:0
Register Address 7-bit
MSB:1
Stop Start
Read:1
Figure 21. Burst Data Read from Multiple Registers- Split Mode
NACK Stop
Note: A single byte read is initiated by Master with P immediately following first data byte.
Master
Slave
5.5.4 I²C Control Registers
The BC3770 has one Full-speed I²C control for the application processor (AP).
Register Reset Condition: All registers in the I²C block are reset each time the VSYS falls below its falling UVLO threshold (typ. 2.5 V).
5.5.4.1 Slave Address
The device supports 7-bit addressing only.
Bit 7, MSB
1
Bit 6
0
Bit 5
0
Bit 4
1
Bit 3
0
Bit 2
0
Bit 1
1
Bit 0, LSB
R/W
Slave Address in binary
1001 001x
Acronyms
R: Read
R/C: Read and Clear
R/W: Read and Write
Slave Address (Write) in hex
92
Slave Address (Read) In hex
93
BC3770
27
Analog Integrated Circuit Device Data
Freescale Semiconductor