M68HC11K Datasheet, PDF (248/290 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Memory Expansion and Chip Selects
Table 11-8. One Chip Select Driving Another
G1DG2 G1DPC G2DPC
0
0
0
0
0
1
0
1
0
0
1
1
Program CS Pin
is Asserted
When Address is in:
A valid program area
A valid program
or general 2 area
A valid program
or general 1 area
A valid program
or general 1 or 2 area
1
0
0
A valid program area
1
0
1
A valid program
or general 2 area
1
1
0
A valid program
or general 1 area
1
1
1
A valid program
or general 1 or 2 area
General 2 CS Pin
is Asserted
When Address is in:
A valid general 2 area
Never asserted
A valid general 2 area
Never asserted
A valid general 2
or general 1 area
Never asserted
A valid general 2 area
Never asserted
General 1 CS Pin
is Asserted
When Address is in:
A valid general 1 area
A valid general 1 area
Never asserted
Never asserted
Never asserted
A valid general 1 area
Never asserted
Never asserted
11.4.5 Clock Stretching
Chip select and bus control signals are synchronized with the external
E clock. To accommodate devices that are slower than the MCU, the
E clock can be stretched when a chip select is asserted so that it remains
high for one to three extra bus cycles. During this stretch, which can
occur only during accesses to addresses in that chip select’s address
range, the other clocks continue running normally, maintaining the
integrity of the timers and baud generators. Each chip select has two
associated bits in the chip-select clock stretch (CSCSTR) register that
set its clock stretching from zero (disabled) to three cycles.
Technical Data
248
Memory Expansion and Chip Selects
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M68HC11K Family
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