M68HC11K_13 Datasheet, PDF (225/290 Pages) Freescale Semiconductor, Inc – M68HC11K Family Technical Data

Freescale Semiconductor, Inc.
Analog-to-Digital (A/D) Converter
Functional Description
The MULT bit in ADCTL determines whether one or four channels are
converted. When MULT = 0, one channel is converted. The selected
channel is sampled and the conversion results are written to ADR1; the
same channel is sampled again, and the conversion results are stored
in ADR2, and so on. In continuous mode, the same channel continues to
be sampled and converted. Setting the MULT bit converts four different
channels; each result register contains the conversion result of a
different channel. In continuous mode, the same four channels are
converted in each sequence.
ADCTL bits [3:0] select the particular channel(s) to be converted. See
Table 10-1.
Table 10-1. A/D Converter Channel Selection
Channel Select Control Bits
CD:CC:CB:CA
0000
0001
0010
0011
0100
0101
0110
0111
10XX
1100
1101
1110
1111
1. Used for factory testing
Channel Signal
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Reserved
V_RH(1)
V_RL(1)
(V_RH)/2⁽¹⁾
Reserved⁽¹⁾
Result Location
When MULT = 1
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
—
ADR1
ADR2
ADR3
ADR4
M68HC11K Family
MOTOROLA
Analog-to-Digital (A/D) Converter
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Technical Data
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