FIN224AC_08 Datasheet, PDF (8/19 Pages) Fairchild Semiconductor – 22-Bit Bi-Directional Serializer/Deserializer

Application Mode Diagrams
TP6
PIXCLK_M
GPIO_MODE
LCD_ENABLE_M
LCD_VSYNC_M
LCD_HSYNC_M
LCD17_M
LCD16_M
LCD15_M
LCD14_M
LCD13_M
LCD
LCD12_M
Controller
Out
LCD11_M
LCD10_M
LCD9_M
LCD8_M
LCD7_M
LCD6_M
LCD5_M
LCD4_M
LCD3_M
LCD2_M
LCD1_M
LCD0_M
SerDes Serializer
VDDP U20
FIN224AC
A6
B5
CKREF
STROBE
F6
F5
J6
DIRI
S2
S1
J5
J4
J3
F3
J2
J1
F2
F1
E2
E1
D2
D1
C2
B1
B2
A1
C3
A2
B3
A3
C4
A4
B4
A5
DP24
DP23
DP22
DP21
DP20
DP19
DP18
DP17
DP16
DP15
DP14
DP13
DP12
DP11
DP10
DP9
DP8
DP7
DP6
DP5
DP4
DP3
DP2
DP1
DIRO ^B6
CKP ^C1
DSO+/DSI-
DSO-/DSI+
CKSO-
CKSO+
CKSI-
CKSI+
VDDA
VDDS
VDDP
D6
D5
C6
C5
E6
E5
2.8V
F4
1.8V
E4
D3
C6
C3
1nF .01uµF
SerDes Deserializer
U22
FIN224AC
J6
F5
F6
S1
S2
DIRI
B5
A6
STROBE
CKREF
B6 _DIRO
2.8V
2.8V
C12
.01uµF
C11 C10
2.2µuF 1nF
D5
D6
DSO-/DSI+
DSO+/DSI-
E6
E5
CKSI-
CKSI+
C6
C5
CKSO-
CKSO+
F4
E4
D3
VDDA
VDDS
VDDP
CKP ^C1
DP24
DP23
DP22
DP21
DP20
DP19
DP18
DP17
DP16
DP15
DP14
DP13
DP12
DP11
DP10
DP9
DP8
DP7
DP6
DP5
DP4
DP3
DP2
DP1
J5
J4
J3
F3
J2
J1
F2
F1
E2
E1
D2
D1
C2
B1
B2
A1
C3
A2
B3
A3
C4
A4
B4
A5
Assumptions:
1) 18-bit Unidirectional RGBApplication
2) Mode 3 Operation (10 Mhz to 20Mhz CKREF)
3) VDDP= (1.65V to 3.6V)
Figure 5. FIN224AC RGB
TP5
PIXCLK_S
LCD_ENABLE_S
LCD_VSYNC_S
LCD_HSYNC_S
LCD17_S
LCD16_S
LCD15_S
LCD14_S
LCD13_S
LCD12_S
LCD11_S
LCD10_S
LCD9_S
LCD
Display
LCD8_S
In
LCD7_S
LCD6_S
LCD5_S
LCD4_S
LCD3_S
LCD2_S
LCD1_S
LCD0_S
TP2
REFCLK
LCD_/WRITE_ENABLE_M
GPIO_MODE
TP1
LCD_/CS_M
LCD_ADDRESS_M
LCD17_M
LCD16_M
LCD15_M
LCD14_M
LCD13_M
LCD
LCD12_M
LCD11_M
Controller LCD10_M
Out
LCD9_M
LCD8_M
LCD7_M
LCD6_M
LCD5_M
LCD4_M
LCD3_M
LCD2_M
LCD1_M
LCD0_M
SerDes Serializer
VDDP ^U21
FIN224AC
A6
B5
CKREF
STROBE
F6
F5
J6
DIRI
S2
S1
J5
J4
J3
F3
J2
J1
F2
F1
E2
E1
D2
D1
C2
B1
B2
A1
C3
A2
B3
A3
C4
A4
B4
A5
DP24
DP23
DP22
DP21
DP20
DP19
DP18
DP17
DP16
DP15
DP14
DP13
DP12
DP11
DP10
DP9
DP8
DP7
DP6
DP5
DP4
DP3
DP2
DP1
DIRO ^B6
CKP ^C1
DSO+/DSI-
DSO-/DSI+
CKSO-
CKSO+
CKSI-
CKSI+
VDDA
VDDS
VDDP
D6
D5
C6
C5
E6
E5
2.8V
F4
1.8V
E4
D3
C5
C2
1nF
.01uFF
SerDes Deserializer
U23
FIN224AC
J6
F5
F6
S1
S2
DIRI
B5
A6
STROBE
CKREF
B6 _DIRO
2.8V
2.8V
C9
.01uFF
C8 C7
2.2FuF 1nF
D5
D6
DSO-/DSI+
DSO+/DSI-
E6
E5
CKSI-
CKSI+
C6
C5
CKSO-
CKSO+
F4
E4
D3
VDDA
VDDS
VDDP
CKP ^C1
DP24
DP23
DP22
DP21
DP20
DP19
DP18
DP17
DP16
DP15
DP14
DP13
DP12
DP11
DP10
DP9
DP8
DP7
DP6
DP5
DP4
DP3
DP2
DP1
J5
J4
J3
F3
J2
J1
F2
F1
E2
E1
D2
D1
C2
B1
B2
A1
C3
A2
B3
A3
C4
A4
B4
A5
TP3
LCD_/WRITE_ENABLE_S
LCD_/CS_S
LCD_ADDRESS_S
LCD17_S
LCD16_S
LCD15_S
LCD14_S
LCD13_S
LCD12_S
LCD11_S
LCD10_S
LCD9_S
LCD
LCD8_S
Display
LCD7_S
LCD6_S
In
LCD5_S
LCD4_S
LCD3_S
LCD2_S
LCD1_S
LCD0_S
Assumptions:
1) 18-bit Unidirectional Controller Application
2) Mode 3 Operation (10 Mhz to 20Mhz CKREF)
3) VDDP= (1.65V to 3.6V)
4) REFCLK is a continously running clock with a frequency
greater than /WRITE_ENABLE.
Figure 6. FIN224AC Microcontroller
Flex Circuit Design Guidelines
The serial I/O information is transmitted at a high serial rate. Care must be taken implementing this serial I/O flex
cable. The following best practices should be used when developing the flex cabling or Flex PCB:
■ Keep all four differential wires the same length.
■ Allow no noisy signals over or near differential serial wires. Example: No LVCMOS traces over differential wires.
■ Use only one ground plane or wire over the differential serial wires. Do not run ground over top and bottom.
■ Do not place test points on differential serial wires.
■ Use differential serial wires a minimum of 2cm away from the antenna.
© 2006 Fairchild Semiconductor Corporation
FIN224AC Rev.1.1.5
8
www.fairchildsemi.com