FIN224AC_08 Datasheet, PDF (3/19 Pages) Fairchild Semiconductor – 22-Bit Bi-Directional Serializer/Deserializer

Terminal Description
Terminal
Name
DP[1:20]
DP[21:22]
DP[23:24]
CKREF
STROBE
CKP
DSO+ / DSI-
DSO- / DSI+
CKSI+
CKSI-
CKSO+
CKSO-
S1
S2
DIRI
DIRO
V_DDP
V_DDS
V_DDA
GND
I/O Type
Number of
Terminals
Description of Signals
I/O
20
LVCMOS parallel I/O, Direction controlled by DIRI pin
I
2
LVCMOS parallel unidirectional inputs
O
2
LVCMOS unidirectional parallel outputs
IN
1
LVCMOS clock input and PLL reference
IN
1
LVCMOS strobe signal for latching data into the serializer
OUT
DIFF-I/O
1
LVCMOS word clock output
CTL differential serial I/O data signals^(1.)
DSO: Refers to output signal pair
2
DSI: Refers to input signal pair
DSO(I)+: Positive signal of DSO(I) pair
DSO(I)-: Negative signal of DSO(I) pair
DIFF-IN
CTL differential deserializer input bit clock
CKSI: Refers to signal pair
2
CKSI+: Positive signal of CKSI pair
CKSI-: Negative signal of CKSI pair
CTL differential serializer output bit clock
DIFF-OUT
2
CKSO: Refers to signal pair
CKSO+: Positive signal of CKSO pair
CKSO-: Negative signal of CKSO pair
IN
1
LVCMOS mode selection terminals used to select frequency range for
IN
1
the reflect, CKREF
LVCMOS control input used to control direction of data flow:
IN
1
DIRI = “1” Serializer
DIRI = “0” Deserializer
OUT
1
LVCMOS control output inversion of DIRI
Supply
1
Power supply for parallel I/O and translation circuitry
Supply
1
Power supply for core and serial I/O
Supply
1
Power supply for analog PLL circuitry
Supply
2
For ground signals (2 for µBGA, 1 for MLP)
Note:
1. The DSO/DSI serial port pins have been arranged such that if one device is rotated 180 degrees with respect to the
other device, the serial connections properly align without the need for any traces or cable signals to cross. Other
layout orientation may require that traces or cables cross.
© 2006 Fairchild Semiconductor Corporation
FIN224AC Rev.1.1.5
3
www.fairchildsemi.com