FIN224AC_08 Datasheet, PDF (14/19 Pages) Fairchild Semiconductor – 22-Bit Bi-Directional Serializer/Deserializer

AC Loading and Waveforms
t_ROLH
DPn 20%
80% 80%
t_ROHL
20%
DPn
8pF
Figure 7. LVCMOS Output Load and Transition
Times
t_CLKT
90% 90%
t_CLKT
10%
10%
CKREF _50%
t_TCP
V_IH
t_CPWH
V_IL
t_CPWL
50%
Figure 9. LVCMOS Clock Parameters
Setup Time
STROBE
DP[1:12]
t_STC
Data
Hold Time
t_HTC
STROBE
DP[1:12]
Data
Setup: MODE0 = “0” or “1”, MODE1 = “1”, SER/DES = “1”
Figure 8. Serial Setup and Hold Times
Data Time
CKP
DP[1:12]
t_PDV
Data
CKREF
t_RCOP
75%
50%
50%
25%
t_RCOH
t_RCOL
Setup: EN_DES = “1”, CKSI and DSI are valid signals
Figure 10. Deserializser Data Valid Window Time and
Clock Output Parameters
V_DD/V_DDA
S1 or S2
t_TPLLS0
CKREF
CKS0
Note: CKREF Signal is free running.
Figure 11. Serializer PLL Lock Time
© 2006 Fairchild Semiconductor Corporation
FIN224AC Rev.1.1.5
14
www.fairchildsemi.com