FIN224AC_08 Datasheet, PDF (17/19 Pages) Fairchild Semiconductor – 22-Bit Bi-Directional Serializer/Deserializer

Physical Dimensions
0.15 C
6.00
B
A
PIN #1 IDENT
0.80 MAX
0.10 C
0.08 C _0.05
0.00
SEATING
PLANE
4.20
4.00
6.00
6.38MIN
0.15 C
4.77MIN
(0.20)
C
0.50
0.30
0.28 MAX
X40 E
0.50TYP
(0.80)
4.37MAX
0.20MIN
X4
0.50
(DATUM B)
4.20
4.00
(DATUM A)
PIN #1 ID
0.50
0.18-0.30
0.10
0.05
CAB
C
NOTES:
A. CONFORMS TO JEDEC REGISTRATION MO-220, VARIATION
WJJD-2 WITH EXCEPTION THAT THIS IS A SAWN VERSION..
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994.
D. LAND PATTERN PER IPC SM-782.
E. WIDTH REDUCED TO AVOID SOLDER BRIDGING.
F. DIMENSIONS ARE NOT INCLUSIVE OF BURRS, MOLD FLASH, OR
TIE BAR PROTRUSIONS.
G. DRAWING FILENAME: MKT-MLP40Arev3.
Figure 16. 40-Terminal, Molded Leadless Package (MLP), Quad, JEDEC MO0220, 6mm Square
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
© 2006 Fairchild Semiconductor Corporation
FIN224AC Rev.1.1.5
17
www.fairchildsemi.com