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FAN5231 Datasheet, PDF (4/17 Pages) Fairchild Semiconductor – Precision Dual PWM Controller And Linear Regulator for Notebook CPUs
FAN5231
Electrical Specifications
(Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3)
Parameter
VCC Supply
Nominal Supply Current
Shut-down Supply Current
Battery Pin Supply Current
Battery Pin Leakage Current at
Shut-Down
Power-On Reset
Rising VCC Threshold
Falling VCC Threshold
Oscillator
Free Running Frequency
Ramp Amplitude, pk-pk
Ramp Offset
Reference, DAC and Soft Start
VID0-VID4 Input Low Voltage
VID0-VID4 Input High Voltage
VID0-VID4 Pull-up Current to VCC
DAC Voltage Accuracy
Soft-Start Current During Start-Up
Soft-Start Current During Mode
Change
Enable
Enable Voltage Low
Enable Voltage High
PWM 1 Converter
Output Voltage
Static Load Regulation
Symbol
ICC
ICCS
IVIN
IVINSD
ISS
ISSM
VENLOW
VENHIGH
VOUT1
Test Condition
GATE1, GATE2 Open
Vbat = 16V
Measured at pin 18
VSS = 0V…0.9V
VSS = 0.925V…2.0V
IC Inhibited
IC Enabled
Input has internal pull-up current
source 2µA typ
Defined by the current VID code
(Table 1)
100mA < IVOUT1 < 15.0A
Min. Typ. Max Units
– 2 2.5 mA
– 30 50 µA
– – 100 µA
– – 5 µA
4.3 4.5 4.6 V
3.9 4.1 4.3 V
255 300 345 kHz
– 2– V
– 0.5 – V
– – 0.8 V
2.0 – – V
– 1 – µA
-1.0 – +1.0 %
18 27 36 µA
350 500 650 µA
– – 0.8 V
2.0 – – V
0.925 – 2.0 V
-2.0 – +2.0 %
Under-Voltage Shut-Down Level VUV1
Percent of the voltage set by VID
70 75 80 %
code. Disabled during dynamic VID
code change.
Under-Voltage Shut Down Delay TDOC1
– 1.4 – µs
Over-Voltage
Over-Voltage Shut Down Delay
Over-Current Comparator
Threshold
PWM 2 Converter
Output Voltage
Load Regulation
VOVP1
TDOV1
IOC1
Percent of the voltage set by VID
code.
110 115 120 %
– 2.4 – µs
100 135 170 µA
VOUT2
100mA < IVOUT3 < 2.1A
1.5
V
-2.0 – +2.0 %
4
REV. 1.1.1 8/15/01