FAN5078 Datasheet, PDF (4/16 Pages) Fairchild Semiconductor – DDR/ACPI Regulator Combo

5VSB
VCC
D2
EN
POR/UVLO
S3#I
S3
VDDQ
OSC
CLK
FB
RAMP
Q
SR
OVP
ADAPTIVE
GATE
CONTROL LOGIC ^VDD
PWM
COMP
FB
PWM
RAMP
S/H
4.41K
ISNS
ILIM det.
SS
PGOOD
VDDQ IN
Reference and
Soft Start
VREF
CURRENT PROCESSING
Figure 2. PWM Modulator Block Diagram
BOOT
C_BOOT
VIN
Q1
HDRV
SW
Q2
LDRV
PGND
VDDQ
L _OUT
C_OUT
ISNS ^RSENSE
ILIM
R_ILIM
VDDQ IN
R9
REF IN
R10
VTT SNS
50K
EN
+
–
110K
S3#I
VDDQ IN
VTT OUT
PGND
Figure 3. VTT Regulator Block Diagram
© 2006 Fairchild Semiconductor Corporation
4
FAN5078 Rev. 1.0.0 • 05/11/06
www.fairchildsemi.com