FAN5240 Datasheet, PDF (15/19 Pages) Fairchild Semiconductor – Multi-Phase PWM Controller for AMD Mobile Athlon TM and Duron TM

PRODUCT SPECIFICATION
FAN5240
High-Side Losses:
V_DS
C _ISS
C _RSS
C _ISS
I_D
V_GS
Q_GS
Q_GD
V_SP
V_TH
Q_G(SW)
t1
t2
t3
C_ISS = C_GS || C_GD
4.5V
t4
t5
Figure 12. Switching losses and QG
5V
R_D
VIN
19 ^HDRV
20 ^SW
C_GD
R_GATE
G
C_GS
Figure 13. Drive Equivalent Circuit
Assuming switching losses are about the same for both the
rising edge and falling edge, Q1’s switching losses, as can be
seen by Figure 12, are given by:
P_UPPER = P_SW + P_COND
P_SW
=


V_{-----D---S--2---}×_-----I_--L-
×
2
×
t_{S}
F_SW
P_COND
=
V_{---V--O---I-UN---T--}
×
I_O
U
2
T
×
R_DS(ON)
(15a)
(15b)
(15c)
where RDS(ON) is @TJ(MAX) and:
tS is the switching period (rise or fall time) and is predomi-
nantly the sum of t2, t3 (Figure 12), a function of the imped-
ance of the driver and the QG(SW) of the MOSFET. Since
most of tS occurs when VGS = VSP we can use a constant
current assumption for the driver to simplify the calculation
of tS :
t_S = _I-^Q-_D----^GR----⁽_I--_VS---_EW---_R--⁾ ≈ _---_{R----------D--------R--V-----I}---_DV-^Q-------_E--D^G_----R----⁽_----–^S_--+------^W_V----R----S-⁾---_{G----P----A--------T------E-----}-
(16)
For the high-side MOSFET, VDS = VIN, which can be as
high as 20V in a typical portable application. Q2, however,
switches on or off with its parallel shottky diode conducting,
therefore VDS ≈ 0.5V. Since PSW is proportional to VDS ,
Q2's switching losses are negligible and we can select Q2
based on RDS(ON) only.
Care should also be taken to include the delivery of the
MOSFET's gate power ( PGATE ) in calculating the power
dissipation required for the FAN5240:
P_GATE = Q_G × VDD × F_SW
(17)
Low-Side Losses
Conduction losses for Q2 are given by:
P_COND
=
(1
–
D)
×
I_O
U
2
T
×
R_DS(ON)
(18)
where RDS(ON) is the RDS(ON) of the MOSFET at the
highest operating junction temperature and D = ^V---_V--^O---_I-^UN---^T-- is
the minimum duty cycle for the converter. Since DMIN is 5%
for portable computers, (1-D) ≈ 1, further simplifying the
calculation.
The maximum power dissipation (PD(MAX) ) is a function of
the maximum allowable die temperature of the low-side
MOSFET, the θJ-A, and the maximum allowable ambient
temperature rise:
P_D(MAX) = ^T----^J---⁽--^M----^A----^X-_θ--⁾--_J-–--_–---^T-_A---^A---⁽--^M----^A----^X---⁾
θJ-A, depends primarily on the amount of PCB area that can
be devoted to heat sinking (see FSC app note AN-1029 for
SO-8 MOSFET thermal information).
REV. 1.1.7 8/29/02
15