FAN5240 Datasheet, PDF (10/19 Pages) Fairchild Semiconductor – Multi-Phase PWM Controller for AMD Mobile Athlon TM and Duron TM

FAN5240
Current Processing Section
The following discussion refers to Figure 6.
Setting RSENSE
Each phase current is sampled about 200nS after the SW
node crosses 0V. For proper converter operation, choose an
RSENSE value of:
R_SENSE
=
R_{-----D----S---(--O----N----)---}•_----I_{--M----A----X-}
40µA
PRODUCT SPECIFICATION
With Active Droop, the output voltage varies with the load as
if a resistor were connected in series with the converter’s out-
put, in other words, it's effect is to raise the output resistance
of the converter.
1.2
V_DROOP
which is about 1K for the components in Figure 1.
Active Droop
The core converter incorporates a proprietary output voltage
droop method for optimum handling of fast load transients
found in modern processors.
“Active droop” or voltage positioning is now widely used in
the computer power applications. The technique is based on
raising the converter voltage at light load in anticipation of a
step increase in load current, and conversely, lowering
VCORE in anticipation of a step decrease in load current.
I_LOAD
I_MAX
Figure 5. Active Droop
To get the most from the Active Droop, its magnitude should
be scaled to match the output capacitor’s ESR voltage drop.
V_DROOP = I_MAX × ESR
(6)
Active Droop allows the size and cost of the output capaci-
tors required to handle CPU current transients to be reduced.
The reduction may be almost a factor of 2 when compared to
a system without Active Droop.
ISNS1-ISNS2
ISNS2
B-A
A _ΣB
ISNS2-ISNS1
A-B
ISNS2
5
To A1 (+)
S/H
ISNS1
ISNS1
5
V to I
in +
ISNS1
8 _{in D}
ILIM det. 1
2.5V
0.9V
I2 =
ILIM
ILIM mirror
R
ISNS1
SENSE
LDRV1
PGND1
ILIM ^RILIM
Figure 6. Current Limit and Active Droop Circuits
10
REV. 1.1.7 8/29/02